Searched refs:mmSDMA0_RLC0_RB_RPTR_ADDR_HI (Results 1 - 14 of 14) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_amdkfd_arcturus.c191 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,
H A Damdgpu_amdkfd_gfx_v10.c489 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,
H A Damdgpu_amdkfd_gfx_v8.c356 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,
H A Damdgpu_amdkfd_gfx_v9.c477 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,
H A Damdgpu_amdkfd_gfx_v7.c370 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h308 #define mmSDMA0_RLC0_RB_RPTR_ADDR_HI 0x0148 macro
H A Dsdma0_4_0_offset.h396 #define mmSDMA0_RLC0_RB_RPTR_ADDR_HI 0x0148 macro
H A Dsdma0_4_2_2_offset.h396 #define mmSDMA0_RLC0_RB_RPTR_ADDR_HI 0x0138 macro
H A Dsdma0_4_2_offset.h392 #define mmSDMA0_RLC0_RB_RPTR_ADDR_HI 0x0148 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h224 #define mmSDMA0_RLC0_RB_RPTR_ADDR_HI 0x3508 macro
H A Doss_2_0_d.h278 #define mmSDMA0_RLC0_RB_RPTR_ADDR_HI 0x3508 macro
H A Doss_3_0_1_d.h263 #define mmSDMA0_RLC0_RB_RPTR_ADDR_HI 0x3508 macro
H A Doss_3_0_d.h385 #define mmSDMA0_RLC0_RB_RPTR_ADDR_HI 0x3508 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h385 #define mmSDMA0_RLC0_RB_RPTR_ADDR_HI 0x0148 macro
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