Searched refs:mmSDMA0_EDC_COUNTER (Results 1 - 6 of 6) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_sdma_v4_0.c | 269 { "SDMA_UCODE_BUF_SED", SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER),
273 { "SDMA_RB_CMD_BUF_SED", SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER),
277 { "SDMA_IB_CMD_BUF_SED", SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER),
281 { "SDMA_UTCL1_RD_FIFO_SED", SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER),
285 { "SDMA_UTCL1_RDBST_FIFO_SED", SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER),
289 { "SDMA_DATA_LUT_FIFO_SED", SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER),
293 { "SDMA_MBANK_DATA_BUF0_SED", SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER),
297 { "SDMA_MBANK_DATA_BUF1_SED", SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER),
301 { "SDMA_MBANK_DATA_BUF2_SED", SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER),
305 { "SDMA_MBANK_DATA_BUF3_SED", SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER),
[all...] |
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/ |
| H A D | sdma0_4_1_offset.h | 122 #define mmSDMA0_EDC_COUNTER 0x0036 macro
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| H A D | sdma0_4_0_offset.h | 124 #define mmSDMA0_EDC_COUNTER 0x0036 macro
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| H A D | sdma0_4_2_2_offset.h | 124 #define mmSDMA0_EDC_COUNTER 0x0036 macro
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| H A D | sdma0_4_2_offset.h | 124 #define mmSDMA0_EDC_COUNTER 0x0036 macro
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_1_0_offset.h | 96 #define mmSDMA0_EDC_COUNTER 0x0036 macro
[all...] |
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