Searched refs:mmMP0_SMN_C2PMSG_58 (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_offset.h82 #define mmMP0_SMN_C2PMSG_58 0x007a macro
H A Dmp_11_0_offset.h82 #define mmMP0_SMN_C2PMSG_58 0x007a macro
H A Dmp_12_0_0_offset.h82 #define mmMP0_SMN_C2PMSG_58 0x007a macro
H A Dmp_9_0_offset.h82 #define mmMP0_SMN_C2PMSG_58 0x007a macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_psp_v3_1.c207 psp->sos_fw_version = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_58);
236 ver = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_58);
H A Damdgpu_psp_v12_0.c104 psp->sos_fw_version = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_58);
H A Damdgpu_psp_v11_0.c289 psp->sos_fw_version = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_58);
325 psp->sos_fw_version = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_58);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Damdgpu_dce_dmcu.c68 #define mmMP0_SMN_C2PMSG_58 0x1607A macro
882 psp_version = dm_read_reg(ctx, mmMP0_SMN_C2PMSG_58);

Completed in 203 milliseconds