Searched refs:mmMP0_SMN_C2PMSG_102 (Results 1 - 7 of 7) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_psp_v12_0.c | 254 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg);
504 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102);
516 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value);
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| H A D | amdgpu_psp_v3_1.c | 319 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg);
597 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102);
608 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value);
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| H A D | amdgpu_psp_v11_0.c | 502 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg);
1099 data = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102);
1111 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value);
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mp/ |
| H A D | mp_10_0_offset.h | 170 #define mmMP0_SMN_C2PMSG_102 0x00a6 macro
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| H A D | mp_11_0_offset.h | 170 #define mmMP0_SMN_C2PMSG_102 0x00a6 macro
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| H A D | mp_12_0_0_offset.h | 170 #define mmMP0_SMN_C2PMSG_102 0x00a6 macro
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| H A D | mp_9_0_offset.h | 170 #define mmMP0_SMN_C2PMSG_102 0x00a6 macro
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