Searched refs:mmMMEA1_DRAM_WR_PRI_QUEUING (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_offset.h864 #define mmMMEA1_DRAM_WR_PRI_QUEUING 0x024e macro
H A Dmmhub_9_1_offset.h864 #define mmMMEA1_DRAM_WR_PRI_QUEUING 0x024e macro
H A Dmmhub_9_3_0_offset.h866 #define mmMMEA1_DRAM_WR_PRI_QUEUING 0x024e macro
H A Dmmhub_9_4_1_offset.h1788 #define mmMMEA1_DRAM_WR_PRI_QUEUING 0x03ce macro

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