Searched refs:mmMMEA1_DRAM_RD_PRI_QUEUING_BASE_IDX (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_offset.h863 #define mmMMEA1_DRAM_RD_PRI_QUEUING_BASE_IDX 0 macro
H A Dmmhub_9_1_offset.h863 #define mmMMEA1_DRAM_RD_PRI_QUEUING_BASE_IDX 0 macro
H A Dmmhub_9_3_0_offset.h865 #define mmMMEA1_DRAM_RD_PRI_QUEUING_BASE_IDX 0 macro
H A Dmmhub_9_4_1_offset.h1787 #define mmMMEA1_DRAM_RD_PRI_QUEUING_BASE_IDX 1 macro

Completed in 352 milliseconds