Searched refs:mmMMEA0_EDC_CNT2 (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_mmhub_v9_4.c712 { "MMEA0_GMIRD_CMDMEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA0_EDC_CNT2),
716 { "MMEA0_GMIWR_CMDMEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA0_EDC_CNT2),
720 { "MMEA0_GMIWR_DATAMEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA0_EDC_CNT2),
724 { "MMEA0_GMIRD_PAGEMEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA0_EDC_CNT2),
728 { "MMEA0_GMIWR_PAGEMEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA0_EDC_CNT2),
760 { "MMEA0_MAM_D0MEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA0_EDC_CNT2),
764 { "MMEA0_MAM_D1MEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA0_EDC_CNT2),
768 { "MMEA0_MAM_D2MEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA0_EDC_CNT2),
772 { "MMEA0_MAM_D3MEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA0_EDC_CNT2),
1522 { SOC15_REG_ENTRY(MMHUB, 0, mmMMEA0_EDC_CNT2),
[all...]
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_2_0_0_offset.h824 #define mmMMEA0_EDC_CNT2 0x0210 macro
H A Dmmhub_1_0_offset.h814 #define mmMMEA0_EDC_CNT2 0x0202 macro
H A Dmmhub_9_1_offset.h814 #define mmMMEA0_EDC_CNT2 0x0202 macro
H A Dmmhub_9_3_0_offset.h816 #define mmMMEA0_EDC_CNT2 0x0207 macro
H A Dmmhub_9_4_1_offset.h1730 #define mmMMEA0_EDC_CNT2 0x0387 macro

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