Searched refs:mmGB_EDC_MODE (Results 1 - 9 of 9) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h658 #define mmGB_EDC_MODE 0x307E macro
H A Dgfx_7_2_d.h755 #define mmGB_EDC_MODE 0x307e macro
H A Dgfx_7_0_d.h742 #define mmGB_EDC_MODE 0x307e macro
H A Dgfx_8_1_d.h827 #define mmGB_EDC_MODE 0x307e macro
H A Dgfx_8_0_d.h827 #define mmGB_EDC_MODE 0x307e macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v8_0.c1540 tmp = RREG32(mmGB_EDC_MODE);
1541 WREG32(mmGB_EDC_MODE, 0);
1667 WREG32(mmGB_EDC_MODE, tmp);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2489 #define mmGB_EDC_MODE 0x107e macro
H A Dgc_9_1_offset.h2766 #define mmGB_EDC_MODE 0x107e macro
H A Dgc_10_1_0_offset.h4830 #define mmGB_EDC_MODE 0x1e1e macro
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