Searched refs:mmATC_L2_CACHE_2M_DSM_CNTL_BASE_IDX (Results 1 - 1 of 1) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/ | ||
| H A D | gc_9_4_1_offset.h | 241 #define mmATC_L2_CACHE_2M_DSM_CNTL_BASE_IDX 0 macro |
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