Searched refs:ixSMU_PM_STATUS_95 (Results 1 - 7 of 7) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_d.h661 #define ixSMU_PM_STATUS_95 0x3ff7c macro
H A Dsmu_7_1_3_d.h886 #define ixSMU_PM_STATUS_95 0x3ff7c macro
H A Dsmu_7_1_2_d.h1023 #define ixSMU_PM_STATUS_95 0x3ff7c macro
H A Dsmu_7_1_0_d.h1102 #define ixSMU_PM_STATUS_95 0x3ff7c macro
H A Dsmu_7_0_1_d.h1107 #define ixSMU_PM_STATUS_95 0x3ff7c macro
H A Dsmu_7_1_1_d.h897 #define ixSMU_PM_STATUS_95 0x33f7c macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_smu7_hwmgr.c3516 ixSMU_PM_STATUS_95, 0);
3523 ixSMU_PM_STATUS_95);

Completed in 336 milliseconds