Searched refs:ixCG_SPLL_FUNC_CNTL_4 (Results 1 - 7 of 7) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_d.h50 #define ixCG_SPLL_FUNC_CNTL_4 0xc050014c macro
H A Dsmu_7_1_3_d.h53 #define ixCG_SPLL_FUNC_CNTL_4 0xc050014c macro
H A Dsmu_7_1_2_d.h50 #define ixCG_SPLL_FUNC_CNTL_4 0xc050014c macro
H A Dsmu_7_1_0_d.h50 #define ixCG_SPLL_FUNC_CNTL_4 0xc050014c macro
H A Dsmu_7_0_1_d.h50 #define ixCG_SPLL_FUNC_CNTL_4 0xc050014c macro
H A Dsmu_7_1_1_d.h50 #define ixCG_SPLL_FUNC_CNTL_4 0xc050014c macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_smu7_hwmgr.c4294 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_SPLL_FUNC_CNTL_4);

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