Searched refs:enableMachineScheduler (Results 1 - 24 of 24) sorted by relevance

/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetSubtargetInfo.cpp35 bool TargetSubtargetInfo::enableMachineScheduler() const { function in class:TargetSubtargetInfo
40 return enableMachineScheduler();
57 return enableMachineScheduler() && enablePostRAScheduler();
H A DMachineScheduler.cpp386 } else if (!mf.getSubtarget().enableMachineScheduler())
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblySubtarget.cpp54 bool WebAssemblySubtarget::enableMachineScheduler() const { function in class:WebAssemblySubtarget
H A DWebAssemblySubtarget.h86 bool enableMachineScheduler() const override;
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiSubtarget.h46 bool enableMachineScheduler() const override { return true; }
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVESubtarget.cpp61 bool VESubtarget::enableMachineScheduler() const { return true; } function in class:VESubtarget
H A DVESubtarget.h63 bool enableMachineScheduler() const override;
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcSubtarget.cpp100 bool SparcSubtarget::enableMachineScheduler() const { function in class:SparcSubtarget
H A DSparcSubtarget.h78 bool enableMachineScheduler() const override;
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600Subtarget.h134 bool enableMachineScheduler() const override {
H A DGCNSubtarget.h758 bool enableMachineScheduler() const override {
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMSubtarget.cpp379 bool ARMSubtarget::enableMachineScheduler() const { function in class:ARMSubtarget
396 if (enableMachineScheduler())
405 if (!enableMachineScheduler())
H A DARMSubtarget.h854 bool enableMachineScheduler() const override;
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZSubtarget.h113 bool enableMachineScheduler() const override { return true; }
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVSubtarget.h103 bool enableMachineScheduler() const override { return true; }
/netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetSubtargetInfo.h189 virtual bool enableMachineScheduler() const;
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCSubtarget.cpp189 bool PPCSubtarget::enableMachineScheduler() const { return true; } function in class:PPCSubtarget
H A DPPCSubtarget.h354 bool enableMachineScheduler() const override;
H A DPPCISelLowering.cpp1397 if (Subtarget.enableMachineScheduler())
16311 if (DisableILPPref || Subtarget.enableMachineScheduler())
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.h234 bool enableMachineScheduler() const override;
H A DHexagonSubtarget.cpp462 bool HexagonSubtarget::enableMachineScheduler() const { function in class:HexagonSubtarget
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64Subtarget.h315 bool enableMachineScheduler() const override { return true; }
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86Subtarget.h938 bool enableMachineScheduler() const override { return true; }
/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp264 (ST.enableMachineScheduler() && ST.enableMachineSchedDefaultSched()) ||

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