Searched refs:amdgpu_ring_emit_wreg (Results 1 - 18 of 18) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_nbio_v2_3.c76 amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
H A Damdgpu_nbio_v6_1.c66 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET(
H A Damdgpu_nbio_v7_0.c74 amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
H A Damdgpu_gmc_v10_0.c484 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + (2 * vmid),
487 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + (2 * vmid),
500 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + eng, 0);
516 amdgpu_ring_emit_wreg(ring, reg, pasid);
H A Damdgpu_gmc_v9_0.c645 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + (2 * vmid),
648 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + (2 * vmid),
661 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + eng, 0);
681 amdgpu_ring_emit_wreg(ring, reg, pasid);
H A Damdgpu_gmc_v7_0.c494 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12);
497 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid);
505 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid);
H A Damdgpu_nbio_v7_4.c96 amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
H A Damdgpu_ring.h251 #define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v)) macro
H A Damdgpu_ring.c404 amdgpu_ring_emit_wreg(ring, reg0, ref);
H A Damdgpu_gmc_v6_0.c390 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12);
393 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid);
H A Damdgpu_gmc_v8_0.c696 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12);
699 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid);
707 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid);
H A Damdgpu_vi.c980 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1);
991 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1);
H A Damdgpu_nv.c551 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET(
H A Damdgpu_gfx.c726 amdgpu_ring_emit_wreg(ring, reg, v);
H A Damdgpu_cik.c1833 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1);
1844 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1);
H A Damdgpu_si.c1271 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1);
1282 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1);
H A Damdgpu_soc15.c832 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET(
H A Damdgpu_sdma_v5_0.c1184 amdgpu_ring_emit_wreg(ring, reg0, ref);

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