H A D | amdgpu_soc15.c | 102 static u32 soc15_pcie_rreg(struct amdgpu_device *adev, u32 reg) argument 106 address = adev->nbio.funcs->get_pcie_index_offset(adev); 107 data = adev->nbio.funcs->get_pcie_data_offset(adev); 109 spin_lock_irqsave(&adev->pcie_idx_lock, flags); 113 spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); 117 static void soc15_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) argument 121 address = adev->nbio.funcs->get_pcie_index_offset(adev); 132 soc15_pcie_rreg64(struct amdgpu_device *adev, u32 reg) argument 153 soc15_pcie_wreg64(struct amdgpu_device *adev, u32 reg, u64 v) argument 175 soc15_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg) argument 190 soc15_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v) argument 203 soc15_didt_rreg(struct amdgpu_device *adev, u32 reg) argument 218 soc15_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v) argument 231 soc15_gc_cac_rreg(struct amdgpu_device *adev, u32 reg) argument 243 soc15_gc_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v) argument 253 soc15_se_cac_rreg(struct amdgpu_device *adev, u32 reg) argument 265 soc15_se_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v) argument 275 soc15_get_config_memsize(struct amdgpu_device *adev) argument 280 soc15_get_xclk(struct amdgpu_device *adev) argument 291 soc15_grbm_select(struct amdgpu_device *adev, u32 me, u32 pipe, u32 queue, u32 vmid) argument 303 soc15_vga_set_state(struct amdgpu_device *adev, bool state) argument 308 soc15_read_disabled_bios(struct amdgpu_device *adev) argument 314 soc15_read_bios_from_rom(struct amdgpu_device *adev, u8 *bios, u32 length_bytes) argument 363 soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset) argument 380 soc15_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) argument 395 soc15_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) argument 428 soc15_program_register_sequence(struct amdgpu_device *adev, const struct soc15_reg_golden *regs, const u32 array_size) argument 460 soc15_asic_mode1_reset(struct amdgpu_device *adev) argument 494 soc15_asic_baco_reset(struct amdgpu_device *adev) argument 515 soc15_asic_reset_method(struct amdgpu_device *adev) argument 550 soc15_asic_reset(struct amdgpu_device *adev) argument 570 soc15_supports_baco(struct amdgpu_device *adev) argument 592 soc15_set_uvd_clocks(struct amdgpu_device *adev, u32 vclk, u32 dclk) argument 605 soc15_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) argument 612 soc15_pcie_gen3_enable(struct amdgpu_device *adev) argument 630 soc15_program_aspm(struct amdgpu_device *adev) argument 639 soc15_enable_doorbell_aperture(struct amdgpu_device *adev, bool enable) argument 655 soc15_get_rev_id(struct amdgpu_device *adev) argument 660 soc15_set_ip_blocks(struct amdgpu_device *adev) argument 821 soc15_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) argument 826 soc15_invalidate_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) argument 836 soc15_need_full_reset(struct amdgpu_device *adev) argument 841 soc15_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0, uint64_t *count1) argument 888 vega20_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0, uint64_t *count1) argument 937 soc15_need_reset_on_init(struct amdgpu_device *adev) argument 960 soc15_get_pcie_replay_count(struct amdgpu_device *adev) argument 1019 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1247 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1261 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1273 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1280 soc15_doorbell_range_init(struct amdgpu_device *adev) argument 1301 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1330 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1350 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1357 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1377 soc15_update_hdp_light_sleep(struct amdgpu_device *adev, bool enable) argument 1411 soc15_update_drm_clock_gating(struct amdgpu_device *adev, bool enable) argument 1440 soc15_update_drm_light_sleep(struct amdgpu_device *adev, bool enable) argument 1455 soc15_update_rom_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument 1476 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1527 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local [all...] |