Searched refs:XUSB_PADCTL_USB3_PAD_MUX_REG (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/arch/arm/nvidia/
H A Dtegra124_xusbpadreg.h109 #define XUSB_PADCTL_USB3_PAD_MUX_REG 0x134 macro
H A Dtegra210_xusbpad.c65 #define XUSB_PADCTL_USB3_PAD_MUX_REG 0x28 macro
369 SETCLR4(sc, XUSB_PADCTL_USB3_PAD_MUX_REG,
568 SETCLR4(sc, XUSB_PADCTL_USB3_PAD_MUX_REG,
622 XUSBPAD_LANE("sata-0", 0, XUSB_PADCTL_USB3_PAD_MUX_REG, __BITS(31,30),
H A Dtegra124_xusbpad.c122 tegra_reg_set_clear(bst, bsh, XUSB_PADCTL_USB3_PAD_MUX_REG,

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