Searched refs:XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG (Results 1 - 1 of 1) sorted by relevance

/netbsd-current/sys/arch/arm/nvidia/
H A Dtegra210_xusbpad.c137 #define XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG 0x860 macro
440 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG,
456 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG,
459 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG,
462 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG,
465 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG,
467 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG,
503 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG,
507 val = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG);
550 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG,
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