Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG (Results 1 - 1 of 1) sorted by relevance
| /netbsd-current/sys/arch/arm/nvidia/ |
| H A D | tegra210_xusbpad.c | 128 #define XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG 0x37c macro
246 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG,
319 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG,
321 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG,
325 val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG);
334 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG,
338 val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG);
347 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG,
356 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG,
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