Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG (Results 1 - 1 of 1) sorted by relevance
| /netbsd-current/sys/arch/arm/nvidia/ |
| H A D | tegra210_xusbpad.c | 108 #define XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG 0x364 macro
236 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG,
244 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG,
278 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG,
282 val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG);
291 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG,
295 val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG);
354 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG,
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