Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG (Results 1 - 1 of 1) sorted by relevance
| /netbsd-current/sys/arch/arm/nvidia/ |
| H A D | tegra210_xusbpad.c | 96 #define XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG 0x360 macro
242 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG,
258 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG,
261 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG,
264 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG,
267 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG,
269 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG,
305 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG,
309 val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG);
352 SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG,
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