Searched refs:WR2_INTR_1 (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/arch/luna68k/stand/boot/
H A Dsioreg.h128 #define WR2_INTR_1 0x04 /* Interrupt Priority: RxA RxB TxA TxB E/SA E/SA */ macro
H A Dsio.c219 sioreg(WR2A, WR2_VEC86 | WR2_INTR_1);

Completed in 175 milliseconds