Searched refs:WR2A_INTR_0 (Results 1 - 1 of 1) sorted by relevance

/netbsd-current/sys/arch/luna68k/dev/
H A Dsioreg.h106 #define WR2A_INTR_0 0x00 /* Interrupt Priority: RxA TxA RxB TxB E/SA E/SA */ macro

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