Searched refs:UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_6_0_sh_mask.h594 #define UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT 0x11 macro
H A Duvd_5_0_sh_mask.h592 #define UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT 0x11 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1187 #define UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT 0x11 macro
H A Dvcn_2_0_0_sh_mask.h2749 #define UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT 0x11 macro

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