Searched refs:UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4__SHIFT (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h765 #define UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4__SHIFT 0x00000004 macro
H A Duvd_6_0_sh_mask.h574 #define UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4__SHIFT 0x4 macro
H A Duvd_5_0_sh_mask.h572 #define UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4__SHIFT 0x4 macro
H A Duvd_4_2_sh_mask.h540 #define UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4__SHIFT 0x4 macro

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