Searched refs:SW_CSR_INTR_EN (Results 1 - 2 of 2) sorted by relevance
/netbsd-current/sys/arch/sparc/dev/ | ||
H A D | swreg.h | 99 #define SW_CSR_INTR_EN 0x0004 /* (rw,b) interrupts enable */ macro |
H A D | sw.c | 459 SWREG_WRITE(ncr_sc, SWREG_CSR, SW_CSR_SCSI_RES | SW_CSR_INTR_EN); |
Completed in 84 milliseconds