Searched refs:SRW (Results 1 - 10 of 10) sorted by relevance
| /netbsd-current/sys/external/bsd/sljit/dist/sljit_src/ |
| H A D | sljitNativePPC_32.c | 218 return push_inst(compiler, SRW | RC(flags) | S(src1) | A(dst) | B(src2));
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| H A D | sljitNativePPC_64.c | 354 return push_inst(compiler, ((flags & ALT_FORM2) ? SRW : SRD) | RC(flags) | S(src1) | A(dst) | B(src2));
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| H A D | sljitNativePPC_common.c | 212 #define SRW (HI(31) | LO(536)) macro
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| /netbsd-current/external/gpl3/binutils/dist/opcodes/ |
| H A D | rl78-decode.c | 129 #define SRW(r) OP (1, RL78_Operand_Register, RW(r), 0) macro
235 ID(add); W(); DR(AX); SRW(rw); Fzac;
481 ID(mov); W(); DR(AX); SRW(ra);
641 ID(sub); W(); DR(AX); SRW(rw); Fzac;
1250 ID(xch); W(); DR(AX); SRW(ra);
1439 ID(cmp); W(); DR(AX); SRW(ra); Fzac;
5057 ID(mov); W(); DPUSH(); SRW(rg);
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| /netbsd-current/external/gpl3/gdb.old/dist/opcodes/ |
| H A D | rl78-decode.c | 129 #define SRW(r) OP (1, RL78_Operand_Register, RW(r), 0) macro
235 ID(add); W(); DR(AX); SRW(rw); Fzac;
481 ID(mov); W(); DR(AX); SRW(ra);
641 ID(sub); W(); DR(AX); SRW(rw); Fzac;
1250 ID(xch); W(); DR(AX); SRW(ra);
1439 ID(cmp); W(); DR(AX); SRW(ra); Fzac;
5057 ID(mov); W(); DPUSH(); SRW(rg);
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| /netbsd-current/external/gpl3/gdb/dist/opcodes/ |
| H A D | rl78-decode.c | 129 #define SRW(r) OP (1, RL78_Operand_Register, RW(r), 0) macro
235 ID(add); W(); DR(AX); SRW(rw); Fzac;
481 ID(mov); W(); DR(AX); SRW(ra);
641 ID(sub); W(); DR(AX); SRW(rw); Fzac;
1250 ID(xch); W(); DR(AX); SRW(ra);
1439 ID(cmp); W(); DR(AX); SRW(ra); Fzac;
5057 ID(mov); W(); DPUSH(); SRW(rg);
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| /netbsd-current/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | rl78-decode.c | 129 #define SRW(r) OP (1, RL78_Operand_Register, RW(r), 0) macro
235 ID(add); W(); DR(AX); SRW(rw); Fzac;
481 ID(mov); W(); DR(AX); SRW(ra);
641 ID(sub); W(); DR(AX); SRW(rw); Fzac;
1250 ID(xch); W(); DR(AX); SRW(ra);
1439 ID(cmp); W(); DR(AX); SRW(ra); Fzac;
5057 ID(mov); W(); DPUSH(); SRW(rg);
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 3923 case PPC::SRW:
3961 case PPC::SRW: III.ImmOpcode = PPC::RLWINM; break;
4954 Opc == PPC::SRW || Opc == PPC::SRW_rec ||
4961 bool RightShift = Opc == PPC::SRW || Opc == PPC::SRW_rec || Opc == PPC::SRD ||
5136 Opcode == PPC::SLW_rec || Opcode == PPC::SRW || Opcode == PPC::SRW_rec ||
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| H A D | PPCISelDAGToDAG.cpp | 6649 // SLW and SRW always clear the higher-order bits.
6651 Op32.getMachineOpcode() == PPC::SRW) {
6864 case PPC::SRW: NewOpcode = PPC::SRW8; break;
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| H A D | PPCISelLowering.cpp | 11324 BuildMI(BB, dl, TII->get(PPC::SRW), ValueReg)
11366 BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW), SrwDestReg)
12372 BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW), dest)
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