/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyFrameLowering.cpp | 229 unsigned SPReg = getSPReg(MF); local 231 SPReg = MRI.createVirtualRegister(PtrRC); 235 BuildMI(MBB, InsertPt, DL, TII->get(getOpcGlobGet(MF)), SPReg) 244 .addReg(SPReg); 252 .addReg(SPReg) 292 unsigned SPReg = 0; local 296 SPReg = FI->getBasePointerVreg(); 306 SPReg = MRI.createVirtualRegister(PtrRC); 307 BuildMI(MBB, InsertPt, DL, TII->get(getOpcAdd(MF)), SPReg) 311 SPReg [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVFrameLowering.cpp | 314 Register SPReg = getSPReg(STI); local 325 BuildMI(MBB, MBBI, DL, TII->get(Opc), SPReg) 326 .addReg(SPReg) 339 Register SPReg = getSPReg(STI); local 399 if (STI.isRegisterReservedByUser(SPReg)) 411 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup); 454 adjustReg(MBB, MBBI, DL, FPReg, SPReg, 470 adjustReg(MBB, MBBI, DL, SPReg, SPReg, 526 Register SPReg = getSPReg(STI); local 910 Register SPReg = RISCV::X2; local [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCFrameLowering.cpp | 648 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; local 813 .addReg(SPReg); 827 .addReg(SPReg); 832 .addReg(SPReg); 837 .addReg(SPReg); 847 .addReg(SPReg); 865 .addReg(SPReg); 875 .addReg(SPReg); 888 .addReg(SPReg) 889 .addReg(SPReg); 1258 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; local 1561 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; local [all...] |
H A D | PPCISelLowering.cpp | 11692 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; local 11720 .addReg(SPReg) 11753 BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::STDUX : PPC::STWUX), SPReg) 11755 .addReg(SPReg) 11763 .addReg(SPReg) 11776 BuildMI(BlockMBB, DL, TII->get(isPPC64 ? PPC::STDUX : PPC::STWUX), SPReg) 11778 .addReg(SPReg) 11794 .addReg(SPReg)
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H A D | PPCInstrInfo.cpp | 5166 Register SPReg = Subtarget.isPPC64() ? PPC::X1 : PPC::R1; 5167 if (StackReg == SPReg && StackOffset == TOCSaveOffset)
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsNaClELFStreamer.cpp | 136 unsigned SPReg = MI.getOperand(0).getReg(); local 137 assert((Mips::SP == SPReg) && "Unexpected stack-pointer register."); 138 emitMask(SPReg, LoadStoreStackMaskReg, STI);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.h | 110 Register &SPReg) const; 112 Register &SPReg, int Adjustment) const;
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H A D | X86IndirectThunks.cpp | 245 const Register SPReg = Is64Bit ? X86::RSP : X86::ESP; local 246 addRegOffset(BuildMI(CallTarget, DebugLoc(), TII->get(MovOpc)), SPReg, false, local
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H A D | X86CallLowering.cpp | 96 auto SPReg = variable 101 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg);
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H A D | X86FrameLowering.cpp | 1932 Register SPReg; 1933 int Offset = getFrameIndexReferencePreferSP(MF, Info.PSPSymFrameIdx, SPReg, 1936 assert(Offset >= 0 && SPReg == TRI->getStackRegister()); 3111 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; 3115 SPReg = X86::RSP; 3121 SPReg = X86::ESP; 3134 SPReg, false, -MaxStack); 3144 SPReg, false, -MaxStack);
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H A D | X86ISelLowering.cpp | 24493 Register SPReg = TLI.getStackPointerRegisterToSaveRestore(); 24494 assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and" 24508 SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT); 24516 Chain = DAG.getCopyToReg(Chain, dl, SPReg, Result); // Output chain 24542 Register SPReg = RegInfo->getStackRegister(); 24543 SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, SPTy); 24549 Chain = DAG.getCopyToReg(Chain, dl, SPReg, SP); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | SIFrameLowering.cpp | 484 Register SPReg = MFI->getStackPtrOffsetReg(); local 485 assert(SPReg != AMDGPU::SP_REG); 486 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), SPReg) 1294 Register SPReg = MFI->getStackPtrOffsetReg(); local 1297 BuildMI(MBB, I, DL, TII->get(Op), SPReg) 1298 .addReg(SPReg)
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H A D | AMDGPUCallLowering.cpp | 173 Register SPReg; member in struct:__anon2195::AMDGPUOutgoingArgHandler 200 if (!SPReg) 201 SPReg = MIRBuilder.buildCopy(PtrTy, MFI->getStackPtrOffsetReg()).getReg(0); 205 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg);
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H A D | AMDGPURegisterBankInfo.cpp | 1271 Register SPReg = Info->getStackPtrOffsetReg(); local 1278 auto SPCopy = B.buildCopy(PtrTy, SPReg);
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H A D | SIISelLowering.cpp | 3277 Register SPReg = Info->getStackPtrOffsetReg(); local 3284 SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT); 3306 Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMCallLowering.cpp | 101 auto SPReg = MIRBuilder.buildCopy(p0, Register(ARM::SP)); variable 105 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64CallLowering.cpp | 252 if (!SPReg) 253 SPReg = MIRBuilder.buildCopy(p0, Register(AArch64::SP)).getReg(0); 257 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); 328 Register SPReg; member in struct:__anon2169::OutgoingArgHandler
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsCallLowering.cpp | 266 auto SPReg = MIRBuilder.buildCopy(p0, Register(Mips::SP)); local 271 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 1023 Register SPReg = getStackPointerRegisterToSaveRestore(); local 1026 SDValue StackPointer = DAG.getCopyFromReg(Chain, DL, SPReg, MVT::i32); 1046 SDValue CopyChain = DAG.getCopyToReg(Chain, DL, SPReg, Sub);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 3217 unsigned SPReg = TLI.getStackPointerRegisterToSaveRestore(); local 3218 assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and" 3221 SDValue SP = DAG.getCopyFromReg(Chain, DL, SPReg, VT); 3229 Chain = DAG.getCopyToReg(Chain, DL, SPReg, Result); // Output chain
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 11599 int SPReg = tryParseRegister(); local 11600 if (check(SPReg == -1, SPRegLoc, "stack pointer register expected") || 11601 check(SPReg != ARM::SP && SPReg != UC.getFPReg(), SPRegLoc, 11631 static_cast<unsigned>(SPReg), Offset); 11921 int SPReg = tryParseRegister(); local 11922 if (SPReg == -1) 11924 if (SPReg == ARM::SP || SPReg == ARM::PC) 11949 getTargetStreamer().emitMovSP(SPReg, Offse [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 2601 unsigned SPReg = SP::O6; local 2602 SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT); 2604 Chain = DAG.getCopyToReg(SP.getValue(1), dl, SPReg, NewSP); // Output chain
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 1647 Register SPReg = TLI.getStackPointerRegisterToSaveRestore(); 1648 assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and" 1662 SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT); 1675 Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 6355 Register SPReg = TLI.getStackPointerRegisterToSaveRestore(); 6356 auto SPTmp = MIRBuilder.buildCopy(PtrTy, SPReg); 6371 MIRBuilder.buildCopy(SPReg, SPTmp);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 3444 Register SPReg = getStackPointerRegisterToSaveRestore(); local 3448 SDValue OldSP = DAG.getCopyFromReg(Chain, DL, SPReg, MVT::i64); 3471 Chain = DAG.getCopyToReg(Chain, DL, SPReg, NewSP);
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