Searched refs:SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsislands_smc.h360 #define SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK 0x000fffff macro
H A Damdgpu_si_dpm.c2990 if (clk_v & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT))
3000 tmp = ((clk_v << SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK) |
/netbsd-current/sys/external/bsd/drm2/dist/drm/radeon/
H A Dsislands_smc.h360 #define SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK 0x000fffff macro
H A Dradeon_si_dpm.c2891 if (clk_v & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT))
2901 tmp = ((clk_v << SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK) |

Completed in 201 milliseconds