/netbsd-current/external/gpl3/gdb.old/dist/sim/m68hc11/ |
H A D | gencode.c | 67 #define SET_Z_CLR_NVC M6811_Z_BIT,M6811_NVC_BIT,0 macro 439 { "clra", "->a", "clr8", 1, 0x4f, 2, 2, SET_Z_CLR_NVC }, 450 { "clrb", "->b", "clr8", 1, 0x5f, 2, 2, SET_Z_CLR_NVC }, 462 { "clr", "->(x)", "clr8", 2, 0x6f, 6, 6, SET_Z_CLR_NVC }, 474 { "clr", "->()", "clr8", 3, 0x7f, 6, 6, SET_Z_CLR_NVC }, 635 { "clr", "->(y)", "clr8", 3, 0x6f, 7, 7, SET_Z_CLR_NVC }, 827 { "clr", "->()", "clr8", 3, 0x79, 3, 3, SET_Z_CLR_NVC }, 828 { "clr", "->[]", "clr8", 2, 0x69, 2, 2, SET_Z_CLR_NVC }, 830 { "clra", "->a", "clr8", 1, 0x87, 1, 1, SET_Z_CLR_NVC }, 831 { "clrb", "->b", "clr8", 1, 0xc7, 1, 1, SET_Z_CLR_NVC }, [all...] |
/netbsd-current/external/gpl3/gdb/dist/sim/m68hc11/ |
H A D | gencode.c | 70 #define SET_Z_CLR_NVC M6811_Z_BIT,M6811_NVC_BIT,0 macro 442 { "clra", "->a", "clr8", 1, 0x4f, 2, 2, SET_Z_CLR_NVC }, 453 { "clrb", "->b", "clr8", 1, 0x5f, 2, 2, SET_Z_CLR_NVC }, 465 { "clr", "->(x)", "clr8", 2, 0x6f, 6, 6, SET_Z_CLR_NVC }, 477 { "clr", "->()", "clr8", 3, 0x7f, 6, 6, SET_Z_CLR_NVC }, 638 { "clr", "->(y)", "clr8", 3, 0x6f, 7, 7, SET_Z_CLR_NVC }, 830 { "clr", "->()", "clr8", 3, 0x79, 3, 3, SET_Z_CLR_NVC }, 831 { "clr", "->[]", "clr8", 2, 0x69, 2, 2, SET_Z_CLR_NVC }, 833 { "clra", "->a", "clr8", 1, 0x87, 1, 1, SET_Z_CLR_NVC }, 834 { "clrb", "->b", "clr8", 1, 0xc7, 1, 1, SET_Z_CLR_NVC }, [all...] |
/netbsd-current/external/gpl3/binutils/dist/opcodes/ |
H A D | m68hc11-opc.c | 67 #define SET_Z_CLR_NVC M6811_Z_BIT,M6811_NVC_BIT,0 macro 460 { "clr", OP_IND16, 3, 0x7f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 }, 461 { "clr", OP_IX, 2, 0x6f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 }, 462 { "clr", OP_IY | OP_PAGE2, 3, 0x6f, 7, 7, SET_Z_CLR_NVC, cpu6811, 0 }, 463 { "clr", OP_IND16, 3, 0x79, 3, 3, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 464 { "clr", OP_IDX, 2, 0x69, 2, 2, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 465 { "clr", OP_IDX_1, 3, 0x69, 3, 3, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 466 { "clr", OP_IDX_2, 4, 0x69, 4, 4, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 467 { "clr", OP_D_IDX, 2, 0x69, 5, 5, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 468 { "clr", OP_D_IDX_2, 4, 0x69, 5, 5, SET_Z_CLR_NVC, cpu681 [all...] |
H A D | xgate-opc.c | 68 #define SET_Z_CLR_NVC XGATE_Z_BIT,XGATE_NVC_BIT,0 macro
|
/netbsd-current/external/gpl3/gdb.old/dist/opcodes/ |
H A D | m68hc11-opc.c | 67 #define SET_Z_CLR_NVC M6811_Z_BIT,M6811_NVC_BIT,0 macro 460 { "clr", OP_IND16, 3, 0x7f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 }, 461 { "clr", OP_IX, 2, 0x6f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 }, 462 { "clr", OP_IY | OP_PAGE2, 3, 0x6f, 7, 7, SET_Z_CLR_NVC, cpu6811, 0 }, 463 { "clr", OP_IND16, 3, 0x79, 3, 3, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 464 { "clr", OP_IDX, 2, 0x69, 2, 2, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 465 { "clr", OP_IDX_1, 3, 0x69, 3, 3, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 466 { "clr", OP_IDX_2, 4, 0x69, 4, 4, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 467 { "clr", OP_D_IDX, 2, 0x69, 5, 5, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 468 { "clr", OP_D_IDX_2, 4, 0x69, 5, 5, SET_Z_CLR_NVC, cpu681 [all...] |
H A D | xgate-opc.c | 68 #define SET_Z_CLR_NVC XGATE_Z_BIT,XGATE_NVC_BIT,0 macro
|
/netbsd-current/external/gpl3/gdb/dist/opcodes/ |
H A D | m68hc11-opc.c | 67 #define SET_Z_CLR_NVC M6811_Z_BIT,M6811_NVC_BIT,0 macro 460 { "clr", OP_IND16, 3, 0x7f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 }, 461 { "clr", OP_IX, 2, 0x6f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 }, 462 { "clr", OP_IY | OP_PAGE2, 3, 0x6f, 7, 7, SET_Z_CLR_NVC, cpu6811, 0 }, 463 { "clr", OP_IND16, 3, 0x79, 3, 3, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 464 { "clr", OP_IDX, 2, 0x69, 2, 2, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 465 { "clr", OP_IDX_1, 3, 0x69, 3, 3, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 466 { "clr", OP_IDX_2, 4, 0x69, 4, 4, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 467 { "clr", OP_D_IDX, 2, 0x69, 5, 5, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 468 { "clr", OP_D_IDX_2, 4, 0x69, 5, 5, SET_Z_CLR_NVC, cpu681 [all...] |
H A D | xgate-opc.c | 68 #define SET_Z_CLR_NVC XGATE_Z_BIT,XGATE_NVC_BIT,0 macro
|
/netbsd-current/external/gpl3/binutils.old/dist/opcodes/ |
H A D | m68hc11-opc.c | 67 #define SET_Z_CLR_NVC M6811_Z_BIT,M6811_NVC_BIT,0 macro 460 { "clr", OP_IND16, 3, 0x7f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 }, 461 { "clr", OP_IX, 2, 0x6f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 }, 462 { "clr", OP_IY | OP_PAGE2, 3, 0x6f, 7, 7, SET_Z_CLR_NVC, cpu6811, 0 }, 463 { "clr", OP_IND16, 3, 0x79, 3, 3, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 464 { "clr", OP_IDX, 2, 0x69, 2, 2, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 465 { "clr", OP_IDX_1, 3, 0x69, 3, 3, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 466 { "clr", OP_IDX_2, 4, 0x69, 4, 4, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 467 { "clr", OP_D_IDX, 2, 0x69, 5, 5, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 }, 468 { "clr", OP_D_IDX_2, 4, 0x69, 5, 5, SET_Z_CLR_NVC, cpu681 [all...] |
H A D | xgate-opc.c | 68 #define SET_Z_CLR_NVC XGATE_Z_BIT,XGATE_NVC_BIT,0 macro
|