Searched refs:SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT (Results 1 - 5 of 5) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_0_sh_mask.h823 #define SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT 0x16 macro
H A Dsdma0_4_1_sh_mask.h822 #define SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT 0x16 macro
H A Dsdma0_4_2_2_sh_mask.h845 #define SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT 0x16 macro
H A Dsdma0_4_2_sh_mask.h839 #define SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT 0x16 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h538 #define SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT 0x11 macro
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