Searched refs:REG (Results 1 - 25 of 588) sorted by relevance

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/netbsd-current/external/gpl3/gdb.old/dist/ld/testsuite/ld-mmix/
H A Dgreg-6.d45 0+20 l \*REG\* 0+ P
46 0+21 l \*REG\* 0+ O
47 0+22 l \*REG\* 0+ N
48 0+23 l \*REG\* 0+ M
49 0+24 l \*REG\* 0+ L
50 0+25 l \*REG\* 0+ K
51 0+26 l \*REG\* 0+ J
52 0+27 l \*REG\* 0+ I
53 0+28 l \*REG\* 0+ H
54 0+29 l \*REG\*
[all...]
H A Dgreg-7.d45 0+21 l \*REG\* 0+ P
46 0+22 l \*REG\* 0+ O
47 0+23 l \*REG\* 0+ N
48 0+24 l \*REG\* 0+ M
49 0+25 l \*REG\* 0+ L
50 0+26 l \*REG\* 0+ K
51 0+27 l \*REG\* 0+ J
52 0+28 l \*REG\* 0+ I
53 0+29 l \*REG\* 0+ H
54 0+2a l \*REG\*
[all...]
/netbsd-current/sys/arch/sh3/sh3/
H A Ddevreg.c103 SH ## x ## REG(TRA); \
104 SH ## x ## REG(EXPEVT); \
105 SH ## x ## REG(INTEVT); \
107 SH ## x ## REG(BARA); \
108 SH ## x ## REG(BAMRA); \
109 SH ## x ## REG(BASRA); \
110 SH ## x ## REG(BBRA); \
111 SH ## x ## REG(BARB); \
112 SH ## x ## REG(BAMRB); \
113 SH ## x ## REG(BASR
[all...]
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce120/
H A Damdgpu_hw_translate_dce120.c56 #define REG(reg_name)\ macro
74 case REG(DC_GPIO_GENERIC_A):
104 case REG(DC_GPIO_HPD_A):
131 case REG(DC_GPIO_SYNCA_A):
145 /* REG(DC_GPIO_GENLK_MASK */
146 case REG(DC_GPIO_GENLK_A):
170 case REG(DC_GPIO_DDC1_A):
173 case REG(DC_GPIO_DDC2_A):
176 case REG(DC_GPIO_DDC3_A):
179 case REG(DC_GPIO_DDC4_
[all...]
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn10/
H A Damdgpu_hw_translate_dcn10.c56 #define REG(reg_name)\ macro
74 case REG(DC_GPIO_GENERIC_A):
104 case REG(DC_GPIO_HPD_A):
131 case REG(DC_GPIO_SYNCA_A):
145 /* REG(DC_GPIO_GENLK_MASK */
146 case REG(DC_GPIO_GENLK_A):
170 case REG(DC_GPIO_DDC1_A):
173 case REG(DC_GPIO_DDC2_A):
176 case REG(DC_GPIO_DDC3_A):
179 case REG(DC_GPIO_DDC4_
[all...]
/netbsd-current/external/gpl3/gdb.old/dist/sim/rl78/
H A Dcpu.c59 #define REG(r) ((regbase)->r) macro
99 case RL78_Reg_X: return REG (x);
100 case RL78_Reg_A: return REG (a);
101 case RL78_Reg_C: return REG (c);
102 case RL78_Reg_B: return REG (b);
103 case RL78_Reg_E: return REG (e);
104 case RL78_Reg_D: return REG (d);
105 case RL78_Reg_L: return REG (l);
106 case RL78_Reg_H: return REG (h);
107 case RL78_Reg_AX: return REG (
[all...]
/netbsd-current/external/gpl3/gdb/dist/sim/rl78/
H A Dcpu.c63 #define REG(r) ((regbase)->r) macro
103 case RL78_Reg_X: return REG (x);
104 case RL78_Reg_A: return REG (a);
105 case RL78_Reg_C: return REG (c);
106 case RL78_Reg_B: return REG (b);
107 case RL78_Reg_E: return REG (e);
108 case RL78_Reg_D: return REG (d);
109 case RL78_Reg_L: return REG (l);
110 case RL78_Reg_H: return REG (h);
111 case RL78_Reg_AX: return REG (
[all...]
/netbsd-current/sys/arch/luna68k/stand/boot/
H A Dsio.c107 int rr0 = sioreg(REG(unit, RR0), 0);
108 int rr1 = sioreg(REG(unit, RR1), 0);
116 sioreg(REG(unit, WR0), WR0_ERRRST);
191 while ((sioreg(REG(unit, RR0), 0) & RR0_TXEMPTY) == 0)
197 while ((sioreg(REG(unit, RR0), 0) & RR0_TXEMPTY) == 0)
216 sioreg(REG(0, WR0), WR0_CHANRST);
224 sioreg(REG(0, WR0), WR0_RSTINT);
226 sioreg(REG(0, WR4), WR4_BAUD96 | WR4_STOP1 | WR4_NPARITY);
228 sioreg(REG(0, WR3), WR3_RX8BIT | WR3_RXENBL);
230 sioreg(REG(
[all...]
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn20/
H A Damdgpu_hw_translate_dcn20.c59 #undef REG macro
60 #define REG(reg_name)\ macro
78 case REG(DC_GPIO_GENERIC_A):
108 case REG(DC_GPIO_HPD_A):
134 /* REG(DC_GPIO_GENLK_MASK */
135 case REG(DC_GPIO_GENLK_A):
159 case REG(DC_GPIO_DDC1_A):
162 case REG(DC_GPIO_DDC2_A):
165 case REG(DC_GPIO_DDC3_A):
168 case REG(DC_GPIO_DDC4_
[all...]
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn21/
H A Damdgpu_hw_translate_dcn21.c59 #undef REG macro
60 #define REG(reg_name)\ macro
77 case REG(DC_GPIO_GENERIC_A):
111 case REG(DC_GPIO_HPD_A):
137 /* REG(DC_GPIO_GENLK_MASK */
138 case REG(DC_GPIO_GENLK_A):
162 case REG(DC_GPIO_DDC1_A):
165 case REG(DC_GPIO_DDC2_A):
168 case REG(DC_GPIO_DDC3_A):
171 case REG(DC_GPIO_DDC4_
[all...]
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/mmix/
H A Dsave-op.l16 \*REG\*:000000000000001f X
17 \*REG\*:0000000000000000 X0
H A Dunsave-op.l16 \*REG\*:000000000000001f X
17 \*REG\*:0000000000000000 X0
H A Dreg-op.l23 \*REG\*:0000000000000017 X
24 \*REG\*:000000000000000c Y
25 \*REG\*:0000000000000043 Z
/netbsd-current/external/gpl3/gdb.old/dist/ld/testsuite/ld-powerpc/
H A Dtprel.s8 addis 3,REG,wot@tprel@ha
H A Dtprel.d1 #as: -a64 --defsym REG=13
H A Dtprel32.d2 #as: -a32 --defsym REG=2
/netbsd-current/external/gpl3/binutils.old/dist/gas/config/
H A Drx-parse.y145 %type <regno> REG FLAG CREG BCND BMCND SCCND ACC DREG DREGH DREGL DCREG DCMP
149 %token REG FLAG CREG ACC DREG DREGH DREGL DCREG
283 | MOV DOT_B '#' EXPR ',' '[' REG ']'
286 | MOV DOT_W '#' EXPR ',' '[' REG ']'
289 | MOV DOT_L '#' EXPR ',' '[' REG ']'
292 | MOV DOT_B '#' EXPR ',' disp '[' REG ']'
300 | MOV DOT_W '#' EXPR ',' disp '[' REG ']'
306 | MOV DOT_L '#' EXPR ',' disp '[' REG ']'
314 | RTSD '#' EXPR ',' REG '-' REG
[all...]
/netbsd-current/external/gpl3/binutils/dist/gas/config/
H A Drx-parse.y145 %type <regno> REG FLAG CREG BCND BMCND SCCND ACC DREG DREGH DREGL DCREG DCMP
149 %token REG FLAG CREG ACC DREG DREGH DREGL DCREG
283 | MOV DOT_B '#' EXPR ',' '[' REG ']'
286 | MOV DOT_W '#' EXPR ',' '[' REG ']'
289 | MOV DOT_L '#' EXPR ',' '[' REG ']'
292 | MOV DOT_B '#' EXPR ',' disp '[' REG ']'
300 | MOV DOT_W '#' EXPR ',' disp '[' REG ']'
306 | MOV DOT_L '#' EXPR ',' disp '[' REG ']'
314 | RTSD '#' EXPR ',' REG '-' REG
[all...]
/netbsd-current/external/gpl3/gdb.old/dist/gas/config/
H A Drx-parse.y145 %type <regno> REG FLAG CREG BCND BMCND SCCND ACC DREG DREGH DREGL DCREG DCMP
149 %token REG FLAG CREG ACC DREG DREGH DREGL DCREG
283 | MOV DOT_B '#' EXPR ',' '[' REG ']'
286 | MOV DOT_W '#' EXPR ',' '[' REG ']'
289 | MOV DOT_L '#' EXPR ',' '[' REG ']'
292 | MOV DOT_B '#' EXPR ',' disp '[' REG ']'
300 | MOV DOT_W '#' EXPR ',' disp '[' REG ']'
306 | MOV DOT_L '#' EXPR ',' disp '[' REG ']'
314 | RTSD '#' EXPR ',' REG '-' REG
[all...]
/netbsd-current/external/gpl3/gcc.old/dist/libgcc/config/alpha/
H A Dvms-gcc_shell_handler.c37 typedef unsigned long long REG; typedef
39 #define REG_AT(addr) (*(REG *)(addr))
56 get_dyn_handler_pointer (REG fp)
68 REG handler_slot_offset;
73 REG handler_data_offset;
99 handler_slot_offset = REG_AT ((REG)pd + handler_data_offset);
/netbsd-current/external/gpl3/gcc/dist/libgcc/config/alpha/
H A Dvms-gcc_shell_handler.c37 typedef unsigned long long REG; typedef
39 #define REG_AT(addr) (*(REG *)(addr))
56 get_dyn_handler_pointer (REG fp)
68 REG handler_slot_offset;
73 REG handler_data_offset;
99 handler_slot_offset = REG_AT ((REG)pd + handler_data_offset);
/netbsd-current/usr.sbin/gspa/gspa/
H A Dgsp_inst.c99 #define EXREG (REG|EXPR)
100 #define EAREG (REG|EA)
101 #define EXAREG (REG|EXPR|EA)
104 #define OPTREG (OPTOPRN|REG)
126 {"ABS", 0x0380, ONEREG, {REG, 0, 0, 0}},
127 {"ADD", 0x4000, ADD, {EXREG, REG, OPTSPEC,0}},
128 {"ADDC",0x4200, TWOREG, {REG, REG, 0, 0}},
129 {"ADDI",0x0B20, IMMREG, {EXPR, REG, OPTSPEC,0}},
130 {"ADDK",0x1000, K32REG, {EXPR, REG,
[all...]
/netbsd-current/external/gpl3/gcc.old/dist/gcc/
H A Dregset.h79 #define CLEAR_REGNO_REG_SET(HEAD, REG) bitmap_clear_bit (HEAD, REG)
82 #define SET_REGNO_REG_SET(HEAD, REG) bitmap_set_bit (HEAD, REG)
85 #define REGNO_REG_SET_P(TO, REG) bitmap_bit_p (TO, REG)
/netbsd-current/external/gpl3/gcc/dist/gcc/
H A Dregset.h82 #define CLEAR_REGNO_REG_SET(HEAD, REG) bitmap_clear_bit (HEAD, REG)
85 #define SET_REGNO_REG_SET(HEAD, REG) bitmap_set_bit (HEAD, REG)
88 #define REGNO_REG_SET_P(TO, REG) bitmap_bit_p (TO, REG)
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
H A Damdgpu_dcn10_dpp_cm.c47 #define REG(reg)\ macro
130 gam_regs.csc_c11_c12 = REG(CM_GAMUT_REMAP_C11_C12);
131 gam_regs.csc_c33_c34 = REG(CM_GAMUT_REMAP_C33_C34);
140 gam_regs.csc_c11_c12 = REG(CM_COMA_C11_C12);
141 gam_regs.csc_c33_c34 = REG(CM_COMA_C33_C34);
150 gam_regs.csc_c11_c12 = REG(CM_COMB_C11_C12);
151 gam_regs.csc_c33_c34 = REG(CM_COMB_C33_C34);
225 gam_regs.csc_c11_c12 = REG(CM_OCSC_C11_C12);
226 gam_regs.csc_c33_c34 = REG(CM_OCSC_C33_C34);
230 gam_regs.csc_c11_c12 = REG(CM_COMB_C11_C1
[all...]

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