Searched refs:R6 (Results 1 - 25 of 1314) sorted by relevance

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/netbsd-current/external/gpl3/gdb.old/dist/sim/testsuite/sim/bfin/
H A Dissue123.s11 R6.H = R4.H * R0.L (M), R6.L = R4.L * R0.H (ISS2);
13 _DBG R6;
15 DBGA ( R6.L , 0x8000 );
16 DBGA ( R6.H , 0x8000 );
H A D11080.s24 R6=SEQSTAT;
25 R6 = R6 << 26; define
26 R6 = R6 >> 26; define
29 CC = R6 == R7;
H A Ds4.s33 R6 = R0 << 31; define
34 DBGA ( R6.L , 0x0000 );
35 DBGA ( R6.H , 0x8000 );
45 R6 = R0 << 1; define
46 DBGA ( R6.L , 0x0002 );
47 DBGA ( R6.H , 0x0000 );
59 R6 = R0 >>> 1; define
60 DBGA ( R6.L , 0x0000 );
61 DBGA ( R6.H , 0xc000 );
71 R6 define
78 R6 = R0 << 31; define
85 R6 = R0 << 1; define
92 R6 = R0 >> 1; define
99 R6 = R0 >> 31; define
108 R6 = ROT R0 BY 1; define
119 R6 = ROT R0 BY -1; define
130 R6 = ROT R0 BY 31; define
141 R6 = ROT R0 BY 31; define
152 R6 = ROT R0 BY -31; define
163 R6 = ROT R0 BY -31; define
174 R6 = ROT R0 BY 7; define
184 R6 = ROT R0 BY 0; define
194 R6 = R0 << 1; define
[all...]
H A Dissue140.S10 R6.L = -32768;
11 R6.H = -32768;
15 R4 = R6.L * R1.H;
H A Dcc5.S23 R6 = ( A0 += A1 ); define
24 CHECKREG R6, 0x22222222;
25 R6 = A0.w; define
26 CHECKREG R6, 0x22222222;
29 R6 = A1.w; define
30 CHECKREG R6, 0x11111111;
40 R6 = ( A0 += A1 ); define
41 CHECKREG R6, 0x7fffffff;
42 R6 = A0.w; define
43 CHECKREG R6,
46 R6 = A1.w; define
63 R6 = ( A0 += A1 ); define
65 R6 = A0.w; define
69 R6 = A1.w; define
[all...]
H A Ds5.s17 R6 = ROT R0 BY R1.L; define
18 DBGA ( R6.L , 0x0002 );
19 DBGA ( R6.H , 0x0000 );
30 R6 = ROT R0 BY R1.L; define
31 DBGA ( R6.L , 0x0000 );
32 DBGA ( R6.H , 0x4000 );
42 R6 = ROT R0 BY R1.L; define
43 DBGA ( R6.L , 0x0000 );
44 DBGA ( R6.H , 0xa000 );
54 R6 define
66 R6 = ROT R0 BY R1.L; define
78 R6 = ROT R0 BY R1.L; define
90 R6 = ROT R0 BY R1.L; define
101 R6 = ROT R0 BY R1.L; define
112 R6 = ROT R0 BY R1.L; define
[all...]
H A Dm15.s26 R7 = A1, R6 = A0 (S2RND);
29 DBGA ( R6.L , 0xffe0 );
30 DBGA ( R6.H , 0x1fff );
37 R7 = A1, R6 = A0 (S2RND);
40 DBGA ( R6.L , 0xffff );
41 DBGA ( R6.H , 0x7fff );
50 R7 = A1, R6 = A0 (S2RND);
53 DBGA ( R6.L , 0x0000 );
54 DBGA ( R6.H , 0x8000 );
61 R7 = A1, R6
[all...]
H A Dhwloop-lt-bits.s9 imm32 R6, 0xaaaa5555
10 R4 = R6;
13 LT0 = R6;
14 LT1 = R6;
H A Dm3.s35 R6 = A1.w; define
37 DBGA ( R6.L , 0x8000 );
38 DBGA ( R6.H , 0x3fff );
40 R6 = A0.w; define
42 DBGA ( R6.L , 0x8000 );
43 DBGA ( R6.H , 0x3fff );
49 R6 = A1.w; define
51 DBGA ( R6.L , 0x0000 );
52 DBGA ( R6.H , 0x4000 );
54 R6 define
63 R6 = A1.w; define
68 R6 = A0.w; define
82 R6 = A1.w; define
87 R6 = A0.w; define
97 R6 = A1.w; define
102 R6 = A0.w; define
112 R6 = A1.w; define
117 R6 = A0.w; define
[all...]
H A Dm13.s26 R7 = A1, R6 = A0;
29 DBGA ( R6.L , 0xfff0 );
30 DBGA ( R6.H , 0x7fff );
37 R7 = A1, R6 = A0;
40 DBGA ( R6.L , 0xffff );
41 DBGA ( R6.H , 0x7fff );
50 R7 = A1, R6 = A0;
53 DBGA ( R6.L , 0x0000 );
54 DBGA ( R6.H , 0x8000 );
61 R7 = A1, R6
[all...]
H A Ds14.s20 R6 = ASHIFT R0 BY R3.L; define
21 DBGA ( R6.L , 0x0000 );
22 DBGA ( R6.H , 0x8000 );
36 R6 = ASHIFT R0 BY R3.L; define
37 DBGA ( R6.L , 0xffff );
38 DBGA ( R6.H , 0xffff );
52 R6 = ASHIFT R0 BY R3.L; define
53 DBGA ( R6.L , 0xFF80 );
54 DBGA ( R6.H , 0xFFFF );
68 R6 define
86 R6 = ASHIFT R0 BY R3.L; define
104 R6 = ASHIFT R0 BY R3.L; define
120 R6 = ASHIFT R0 BY R3.L; define
136 R6 = ASHIFT R0 BY R3.L; define
152 R6 = ASHIFT R0 BY R3.L; define
168 R6 = ASHIFT R0 BY R3.L; define
184 R6 = LSHIFT R0 BY R3.L; define
200 R6 = LSHIFT R0 BY R3.L; define
216 R6 = LSHIFT R0 BY R3.L; define
232 R6 = LSHIFT R0 BY R3.L; define
248 R6 = LSHIFT R0 BY R3.L; define
263 R6 = ROT R0 BY 1; define
273 R6 = ROT R0 BY -1; define
283 R6 = ROT R0 BY 31; define
293 R6 = ROT R0 BY 31; define
303 R6 = ROT R0 BY -31; define
313 R6 = ROT R0 BY -31; define
323 R6 = ROT R0 BY 7; define
332 R6 = ROT R0 BY 0; define
341 R6 = R0 << 1; define
[all...]
H A Ddisalnexcpt_implicit.S36 imm32 R6, 0x9abcdef0;
39 [SP - 4] = R6;
44 R6 = BYTEPACK (R0, R1) || R5 = [I##n ++ M##n]; EXP (R5, n); \ define
45 R5 = BYTEPACK (R0, R1) || R6 = [I##n++]; EXP (R6, n); \
54 (R6, R7) = BYTEUNPACK R3:2 || R5 = [I##n ++ M##n]; EXP (R5, n); \
55 (R5, R4) = BYTEUNPACK R1:0 || R6 = [I##n++]; EXP (R6, n); \
56 (R4, R6) = BYTEUNPACK R3:2 || R7 = [I##n--]; EXP (R7, n);
65 SAA (R1:0, R3:2) || R6
74 R6 = BYTEOP1P (R1:0, R3:2) || R5 = [I##n ++ M##n]; EXP (R5, n); \\ define
84 R6 = BYTEOP2P (R1:0, R3:2) (TH) || R5 = [I##n ++ M##n]; EXP (R5, n); \\ define
94 R6 = BYTEOP3P (R1:0, R3:2) (HI) || R5 = [I##n ++ M##n]; EXP (R5, n); \\ define
[all...]
H A Dm14.s26 R7 = A1, R6 = A0 (FU);
29 DBGA ( R6.L , 0xfff0 );
30 DBGA ( R6.H , 0xffff );
39 R7 = A1, R6 = A0 (FU);
42 DBGA ( R6.L , 0xffff );
43 DBGA ( R6.H , 0xffff );
52 R7 = A1, R6 = A0 (FU);
55 DBGA ( R6.L , 0xffff );
56 DBGA ( R6.H , 0xffff );
63 R7 = A1, R6
[all...]
/netbsd-current/external/gpl3/gdb/dist/sim/testsuite/bfin/
H A Dissue123.s11 R6.H = R4.H * R0.L (M), R6.L = R4.L * R0.H (ISS2);
13 _DBG R6;
15 DBGA ( R6.L , 0x8000 );
16 DBGA ( R6.H , 0x8000 );
H A D11080.s24 R6=SEQSTAT;
25 R6 = R6 << 26; define
26 R6 = R6 >> 26; define
29 CC = R6 == R7;
H A Ds4.s33 R6 = R0 << 31; define
34 DBGA ( R6.L , 0x0000 );
35 DBGA ( R6.H , 0x8000 );
45 R6 = R0 << 1; define
46 DBGA ( R6.L , 0x0002 );
47 DBGA ( R6.H , 0x0000 );
59 R6 = R0 >>> 1; define
60 DBGA ( R6.L , 0x0000 );
61 DBGA ( R6.H , 0xc000 );
71 R6 define
78 R6 = R0 << 31; define
85 R6 = R0 << 1; define
92 R6 = R0 >> 1; define
99 R6 = R0 >> 31; define
108 R6 = ROT R0 BY 1; define
119 R6 = ROT R0 BY -1; define
130 R6 = ROT R0 BY 31; define
141 R6 = ROT R0 BY 31; define
152 R6 = ROT R0 BY -31; define
163 R6 = ROT R0 BY -31; define
174 R6 = ROT R0 BY 7; define
184 R6 = ROT R0 BY 0; define
194 R6 = R0 << 1; define
[all...]
H A Dissue140.S10 R6.L = -32768;
11 R6.H = -32768;
15 R4 = R6.L * R1.H;
H A Dcc5.S23 R6 = ( A0 += A1 ); define
24 CHECKREG R6, 0x22222222;
25 R6 = A0.w; define
26 CHECKREG R6, 0x22222222;
29 R6 = A1.w; define
30 CHECKREG R6, 0x11111111;
40 R6 = ( A0 += A1 ); define
41 CHECKREG R6, 0x7fffffff;
42 R6 = A0.w; define
43 CHECKREG R6,
46 R6 = A1.w; define
63 R6 = ( A0 += A1 ); define
65 R6 = A0.w; define
69 R6 = A1.w; define
[all...]
H A Ds5.s17 R6 = ROT R0 BY R1.L; define
18 DBGA ( R6.L , 0x0002 );
19 DBGA ( R6.H , 0x0000 );
30 R6 = ROT R0 BY R1.L; define
31 DBGA ( R6.L , 0x0000 );
32 DBGA ( R6.H , 0x4000 );
42 R6 = ROT R0 BY R1.L; define
43 DBGA ( R6.L , 0x0000 );
44 DBGA ( R6.H , 0xa000 );
54 R6 define
66 R6 = ROT R0 BY R1.L; define
78 R6 = ROT R0 BY R1.L; define
90 R6 = ROT R0 BY R1.L; define
101 R6 = ROT R0 BY R1.L; define
112 R6 = ROT R0 BY R1.L; define
[all...]
H A Dm15.s26 R7 = A1, R6 = A0 (S2RND);
29 DBGA ( R6.L , 0xffe0 );
30 DBGA ( R6.H , 0x1fff );
37 R7 = A1, R6 = A0 (S2RND);
40 DBGA ( R6.L , 0xffff );
41 DBGA ( R6.H , 0x7fff );
50 R7 = A1, R6 = A0 (S2RND);
53 DBGA ( R6.L , 0x0000 );
54 DBGA ( R6.H , 0x8000 );
61 R7 = A1, R6
[all...]
H A Dhwloop-lt-bits.s9 imm32 R6, 0xaaaa5555
10 R4 = R6;
13 LT0 = R6;
14 LT1 = R6;
H A Dm3.s35 R6 = A1.w; define
37 DBGA ( R6.L , 0x8000 );
38 DBGA ( R6.H , 0x3fff );
40 R6 = A0.w; define
42 DBGA ( R6.L , 0x8000 );
43 DBGA ( R6.H , 0x3fff );
49 R6 = A1.w; define
51 DBGA ( R6.L , 0x0000 );
52 DBGA ( R6.H , 0x4000 );
54 R6 define
63 R6 = A1.w; define
68 R6 = A0.w; define
82 R6 = A1.w; define
87 R6 = A0.w; define
97 R6 = A1.w; define
102 R6 = A0.w; define
112 R6 = A1.w; define
117 R6 = A0.w; define
[all...]
H A Dm13.s26 R7 = A1, R6 = A0;
29 DBGA ( R6.L , 0xfff0 );
30 DBGA ( R6.H , 0x7fff );
37 R7 = A1, R6 = A0;
40 DBGA ( R6.L , 0xffff );
41 DBGA ( R6.H , 0x7fff );
50 R7 = A1, R6 = A0;
53 DBGA ( R6.L , 0x0000 );
54 DBGA ( R6.H , 0x8000 );
61 R7 = A1, R6
[all...]
H A Ds14.s20 R6 = ASHIFT R0 BY R3.L; define
21 DBGA ( R6.L , 0x0000 );
22 DBGA ( R6.H , 0x8000 );
36 R6 = ASHIFT R0 BY R3.L; define
37 DBGA ( R6.L , 0xffff );
38 DBGA ( R6.H , 0xffff );
52 R6 = ASHIFT R0 BY R3.L; define
53 DBGA ( R6.L , 0xFF80 );
54 DBGA ( R6.H , 0xFFFF );
68 R6 define
86 R6 = ASHIFT R0 BY R3.L; define
104 R6 = ASHIFT R0 BY R3.L; define
120 R6 = ASHIFT R0 BY R3.L; define
136 R6 = ASHIFT R0 BY R3.L; define
152 R6 = ASHIFT R0 BY R3.L; define
168 R6 = ASHIFT R0 BY R3.L; define
184 R6 = LSHIFT R0 BY R3.L; define
200 R6 = LSHIFT R0 BY R3.L; define
216 R6 = LSHIFT R0 BY R3.L; define
232 R6 = LSHIFT R0 BY R3.L; define
248 R6 = LSHIFT R0 BY R3.L; define
263 R6 = ROT R0 BY 1; define
273 R6 = ROT R0 BY -1; define
283 R6 = ROT R0 BY 31; define
293 R6 = ROT R0 BY 31; define
303 R6 = ROT R0 BY -31; define
313 R6 = ROT R0 BY -31; define
323 R6 = ROT R0 BY 7; define
332 R6 = ROT R0 BY 0; define
341 R6 = R0 << 1; define
[all...]
H A Ddisalnexcpt_implicit.S36 imm32 R6, 0x9abcdef0;
39 [SP - 4] = R6;
44 R6 = BYTEPACK (R0, R1) || R5 = [I##n ++ M##n]; EXP (R5, n); \ define
45 R5 = BYTEPACK (R0, R1) || R6 = [I##n++]; EXP (R6, n); \
54 (R6, R7) = BYTEUNPACK R3:2 || R5 = [I##n ++ M##n]; EXP (R5, n); \
55 (R5, R4) = BYTEUNPACK R1:0 || R6 = [I##n++]; EXP (R6, n); \
56 (R4, R6) = BYTEUNPACK R3:2 || R7 = [I##n--]; EXP (R7, n);
65 SAA (R1:0, R3:2) || R6
74 R6 = BYTEOP1P (R1:0, R3:2) || R5 = [I##n ++ M##n]; EXP (R5, n); \\ define
84 R6 = BYTEOP2P (R1:0, R3:2) (TH) || R5 = [I##n ++ M##n]; EXP (R5, n); \\ define
94 R6 = BYTEOP3P (R1:0, R3:2) (HI) || R5 = [I##n ++ M##n]; EXP (R5, n); \\ define
[all...]

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