Searched refs:R4 (Results 1 - 25 of 1391) sorted by relevance

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/netbsd-current/external/gpl3/gdb.old/dist/sim/testsuite/sim/bfin/
H A D	a25.s	13 R4.L = 0x2d1a; 14 R4.H = 0x32e0; 16 A1.x = R4; 23 R4 = A0.w; define 25 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x001a );
H A D	issue123.s	8 R4.L = 0x7e1c; 9 R4.H = 0x9e22; 11 R6.H = R4.H * R0.L (M), R6.L = R4.L * R0.H (ISS2);
H A D	pr.s	9 R4 = 0x10 define 10 R4 = R4 + R3; define 11 P0 = R4; 13 R4 = 0x14; define 14 R4 = R4 + R3; define 15 I0 = R4; 48 R4 = 0x24; define 49 R4 define 66 R4 = 0x34; define 67 R4 = R4 + R3; define [all...]
H A D	m17.s	21 R4 = 0; define 26 DBGA ( R4.L , 0x0000 ); 27 DBGA ( R4.H , 0x0000 ); 33 R4 = 0; define 37 R4 = A0; define 38 DBGA ( R4.L , 0xffff ); 39 DBGA ( R4.H , 0x7fff ); 45 R4 = 0; define 48 DBGA ( R4.L , 0x0000 ); 49 DBGA ( R4 55 R4 = 0; define [all...]
H A D	hwloop-lt-bits.s	10 R4 = R6; define 11 BITCLR (R4, 0); 17 CC = R0 == R4; 21 CC = R0 == R4;
H A D	vit_max.s	12 R4 = 0 (x); define 13 CC = R5 == R4; 16 R4 = A0; define 17 CC = R4 == R6; 24 imm32 R4, 0xFEED0000 25 CC = R4 == R7; 36 R4 = 0 (x); define 37 CC = R3 == R4; 40 CC = R6 == R4; 48 imm32 R4 [all...]
H A D	a21.s	15 R3 = A1 + A0, R4 = A1 - A0 (S); 17 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0000 ); 26 R3 = A1 + A0, R4 = A1 - A0 (S); 28 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0000 ); 37 R3 = A1 + A0, R4 = A1 - A0 (S); 39 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0000 ); 48 R3 = A1 + A0, R4 [all...]
H A D	a23.s	14 R4 = A0.w; define 16 DBGA ( R4.H , 0xffff ); DBGA ( R4.L , 0xffff ); 25 R4 = A0.w; define 27 DBGA ( R4.H , 0xffff ); DBGA ( R4.L , 0xffff ); 36 R4 = A0.w; define 38 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0001 ); 47 R4 define 58 R4 = A1.w; define 74 R4 = A0.w; define 79 R4 = A1.w; define [all...]
H A D	random_0001.s	10 R4 = A0 (IU); define 11 checkreg R4, 0x45c1969f;
H A D	a22.s	14 R4 = A0.w; define 16 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0001 ); 24 R4 = A0.w; define 27 DBGA ( R4.H , 0xffff ); DBGA ( R4.L , 0xffff ); 35 R4 = A0.w; define 37 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0001 ); 45 R4 define 63 R4 = A0.w; define 68 R4 = A1.w; define [all...]
H A D	disalnexcpt_implicit.S	43 R7 = BYTEPACK (R0, R1) || R4 = [I##n]; EXP (R4, n); \ 46 R4 = BYTEPACK (R0, R1) || R7 = [I##n--]; EXP (R7, n); define 53 (R7, R5) = BYTEUNPACK R1:0 || R4 = [I##n]; EXP (R4, n); \ 55 (R5, R4) = BYTEUNPACK R1:0 || R6 = [I##n++]; EXP (R6, n); \ 56 (R4, R6) = BYTEUNPACK R3:2 || R7 = [I##n--]; EXP (R7, n); 63 SAA (R1:0, R3:2) || R4 = [I##n]; EXP (R4, n); \ 73 R7 = BYTEOP1P (R1:0, R3:2) || R4 76 R4 = BYTEOP1P (R1:0, R3:2) || R7 = [I##n--]; EXP (R7, n); define 86 R4 = BYTEOP2P (R1:0, R3:2) (RNDH) || R7 = [I##n--]; EXP (R7, n); define 96 R4 = BYTEOP3P (R1:0, R3:2) (HI) || R7 = [I##n--]; EXP (R7, n); define [all...]
H A D	hwloop-bits.S	50 R4 = R6; define 51 BITCLR (R4, 0); 64 check_hwloop_regs R6, R4, R7 70 check_hwloop_regs R6, R4, R5 73 LC0 = R4; 74 LT0 = R4; 76 LC1 = R4; 77 LT1 = R4; 85 check_hwloop_regs R4, R4, R [all...]
/netbsd-current/external/gpl3/gdb/dist/sim/testsuite/bfin/
H A D	a25.s	13 R4.L = 0x2d1a; 14 R4.H = 0x32e0; 16 A1.x = R4; 23 R4 = A0.w; define 25 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x001a );
H A D	issue123.s	8 R4.L = 0x7e1c; 9 R4.H = 0x9e22; 11 R6.H = R4.H * R0.L (M), R6.L = R4.L * R0.H (ISS2);
H A D	pr.s	9 R4 = 0x10 define 10 R4 = R4 + R3; define 11 P0 = R4; 13 R4 = 0x14; define 14 R4 = R4 + R3; define 15 I0 = R4; 48 R4 = 0x24; define 49 R4 define 66 R4 = 0x34; define 67 R4 = R4 + R3; define [all...]
H A D	m17.s	21 R4 = 0; define 26 DBGA ( R4.L , 0x0000 ); 27 DBGA ( R4.H , 0x0000 ); 33 R4 = 0; define 37 R4 = A0; define 38 DBGA ( R4.L , 0xffff ); 39 DBGA ( R4.H , 0x7fff ); 45 R4 = 0; define 48 DBGA ( R4.L , 0x0000 ); 49 DBGA ( R4 55 R4 = 0; define [all...]
H A D	hwloop-lt-bits.s	10 R4 = R6; define 11 BITCLR (R4, 0); 17 CC = R0 == R4; 21 CC = R0 == R4;
H A D	vit_max.s	12 R4 = 0 (x); define 13 CC = R5 == R4; 16 R4 = A0; define 17 CC = R4 == R6; 24 imm32 R4, 0xFEED0000 25 CC = R4 == R7; 36 R4 = 0 (x); define 37 CC = R3 == R4; 40 CC = R6 == R4; 48 imm32 R4 [all...]
H A D	a21.s	15 R3 = A1 + A0, R4 = A1 - A0 (S); 17 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0000 ); 26 R3 = A1 + A0, R4 = A1 - A0 (S); 28 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0000 ); 37 R3 = A1 + A0, R4 = A1 - A0 (S); 39 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0000 ); 48 R3 = A1 + A0, R4 [all...]
H A D	a23.s	14 R4 = A0.w; define 16 DBGA ( R4.H , 0xffff ); DBGA ( R4.L , 0xffff ); 25 R4 = A0.w; define 27 DBGA ( R4.H , 0xffff ); DBGA ( R4.L , 0xffff ); 36 R4 = A0.w; define 38 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0001 ); 47 R4 define 58 R4 = A1.w; define 74 R4 = A0.w; define 79 R4 = A1.w; define [all...]
H A D	random_0001.s	10 R4 = A0 (IU); define 11 checkreg R4, 0x45c1969f;
H A D	a22.s	14 R4 = A0.w; define 16 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0001 ); 24 R4 = A0.w; define 27 DBGA ( R4.H , 0xffff ); DBGA ( R4.L , 0xffff ); 35 R4 = A0.w; define 37 DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0001 ); 45 R4 define 63 R4 = A0.w; define 68 R4 = A1.w; define [all...]
H A D	disalnexcpt_implicit.S	43 R7 = BYTEPACK (R0, R1) || R4 = [I##n]; EXP (R4, n); \ 46 R4 = BYTEPACK (R0, R1) || R7 = [I##n--]; EXP (R7, n); define 53 (R7, R5) = BYTEUNPACK R1:0 || R4 = [I##n]; EXP (R4, n); \ 55 (R5, R4) = BYTEUNPACK R1:0 || R6 = [I##n++]; EXP (R6, n); \ 56 (R4, R6) = BYTEUNPACK R3:2 || R7 = [I##n--]; EXP (R7, n); 63 SAA (R1:0, R3:2) || R4 = [I##n]; EXP (R4, n); \ 73 R7 = BYTEOP1P (R1:0, R3:2) || R4 76 R4 = BYTEOP1P (R1:0, R3:2) || R7 = [I##n--]; EXP (R7, n); define 86 R4 = BYTEOP2P (R1:0, R3:2) (RNDH) || R7 = [I##n--]; EXP (R7, n); define 96 R4 = BYTEOP3P (R1:0, R3:2) (HI) || R7 = [I##n--]; EXP (R7, n); define [all...]
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/mt/
H A D	badinsn1.s	3 add R1,R2,R3,R4
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/epiphany/
H A D	regression.s	84 NEXT: STRB R4,[R0,#0x0] ;//Store Byte 86 VERIFY R63,R63,R4,STOREB ; 92 STORES: STRH R4,[R0,#0x0] ;//Store Short 94 VERIFY R63,R63,R4,STORES2 ; 100 STORE: STR R4,[R0,#0x0] ;//Store Word 102 VERIFY R63,R63,R4,STORE2 ; 113 STOREBI: STRB R4,[R0,R4] ;//Store Word 114 LDRB R63,[R0,R4] ;//Load Word 115 VERIFY R63,R63,R4,STORES [all...]

Completed in 194 milliseconds

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Indexes created Thu Jun 27 20:29:42 MDT 2024