Searched refs:PSC_LEV5_ISR (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/arch/mac68k/include/
H A Dpsc.h94 #define PSC_LEV5_ISR 0x150 /* level 5 interrupt status register */ macro
/netbsd-current/sys/arch/mac68k/mac68k/
H A Dpsc.c235 while ((intbits = psc_reg1(PSC_LEV5_ISR)) != psc_reg1(PSC_LEV5_ISR))

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