Searched refs:PSC_LEV4_IER (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/arch/mac68k/include/
H A Dpsc.h89 #define PSC_LEV4_IER 0x144 /* level 4 interrupt enable register */ macro
/netbsd-current/sys/arch/mac68k/mac68k/
H A Dpsc.c130 psc_reg1(PSC_LEV4_IER) = 0x86; /* enable SCC */
185 intbits &= 0xf & psc_reg1(PSC_LEV4_IER);
/netbsd-current/sys/arch/mac68k/obio/
H A Dif_mc_obio.c209 psc_reg1(PSC_LEV4_IER) = 0x80 | (1 << PSCINTR_ENET_DMA);
223 psc_reg1(PSC_LEV4_IER) = (1 << PSCINTR_ENET_DMA);

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