Searched refs:PCIE_BAR4_CNTL__BAR_SIZE_MASK (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
H A Dbif_4_1_sh_mask.h1499 #define PCIE_BAR4_CNTL__BAR_SIZE_MASK 0x1f00 macro
H A Dbif_5_0_sh_mask.h1735 #define PCIE_BAR4_CNTL__BAR_SIZE_MASK 0x1f00 macro
H A Dbif_5_1_sh_mask.h1601 #define PCIE_BAR4_CNTL__BAR_SIZE_MASK 0x1f00 macro
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h3842 #define PCIE_BAR4_CNTL__BAR_SIZE_MASK 0x1F00L macro
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