/netbsd-current/external/gpl3/binutils/dist/gas/config/ |
H A D | rl78-parse.h | 134 MULHU = 335, /* MULHU */ enumerator in enum:yytokentype 259 #define MULHU 335 macro
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H A D | rl78-parse.y | 173 %token MACH MACHU MOV MOV1 MOVS MOVW MULH MULHU MULU 507 | MULHU { ISA_G14 ("MULHU"); } 1304 OPC(MULHU),
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H A D | rl78-parse.c | 320 MULHU = 335, /* MULHU */ enumerator in enum:yytokentype 445 #define MULHU 335 macro 595 YYSYMBOL_MULHU = 80, /* MULHU */ 1154 "MULHU", "MULU", "NOP", "NOT1", "ONEB", "ONEW", "OR", "OR1", "POP", 2751 { ISA_G14 ("MULHU"); } 2755 case 93: /* statement: MULHU $@12 */ 4548 OPC(MULHU),
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/netbsd-current/external/gpl3/binutils.old/dist/gas/config/ |
H A D | rl78-parse.h | 134 MULHU = 335, /* MULHU */ enumerator in enum:yytokentype 259 #define MULHU 335 macro
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H A D | rl78-parse.y | 173 %token MACH MACHU MOV MOV1 MOVS MOVW MULH MULHU MULU 507 | MULHU { ISA_G14 ("MULHU"); } 1304 OPC(MULHU),
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H A D | rl78-parse.c | 320 MULHU = 335, /* MULHU */ enumerator in enum:yytokentype 445 #define MULHU 335 macro 595 YYSYMBOL_MULHU = 80, /* MULHU */ 1154 "MULHU", "MULU", "NOP", "NOT1", "ONEB", "ONEW", "OR", "OR1", "POP", 2751 { ISA_G14 ("MULHU"); } 2755 case 93: /* statement: MULHU $@12 */ 4548 OPC(MULHU),
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | Mips16ISelDAGToDAG.cpp | 211 case ISD::MULHU: { 212 MultOpc = (Opcode == ISD::MULHU ? Mips::MultuRxRy16 : Mips::MultRxRy16);
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H A D | MipsSEISelLowering.cpp | 186 setOperationAction(ISD::MULHU, MVT::i32, Custom); 197 setOperationAction(ISD::MULHU, MVT::i64, Custom); 234 setOperationAction(ISD::MULHU, MVT::i32, Legal); 281 setOperationAction(ISD::MULHU, MVT::i64, Legal); 457 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG);
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/netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 608 /// MULHU/MULHS - Multiply high - Multiply two integers of type iN, 611 MULHU, enumerator in enum:llvm::ISD::NodeType
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/netbsd-current/external/gpl3/gdb.old/dist/gas/config/ |
H A D | rl78-parse.y | 173 %token MACH MACHU MOV MOV1 MOVS MOVW MULH MULHU MULU 507 | MULHU { ISA_G14 ("MULHU"); } 1304 OPC(MULHU),
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 392 setOperationAction(ISD::MULHU, MVT::i16, Expand); 396 setOperationAction(ISD::MULHU, MVT::i64, Expand); 425 setOperationAction(ISD::MULHU, VT, Expand); 554 setTargetDAGCombine(ISD::MULHU); 1840 SDValue Mulhi1 = DAG.getNode(ISD::MULHU, DL, VT, Rcp64, Mullo1); 1855 SDValue Mulhi2 = DAG.getNode(ISD::MULHU, DL, VT, Add1, Mullo2); 1869 SDValue Mulhi3 = DAG.getNode(ISD::MULHU, DL, VT, LHS, Add2); 2011 DAG.getNode(ISD::MULHU, DL, VT, Z, NegYZ)); 2014 SDValue Q = DAG.getNode(ISD::MULHU, DL, VT, X, Z); 3983 case ISD::MULHU [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86IntrinsicsInfo.h | 387 X86_INTRINSIC_DATA(avx2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0), 838 X86_INTRINSIC_DATA(avx512_pmulhu_w_512, INTR_TYPE_2OP, ISD::MULHU, 0), 1058 X86_INTRINSIC_DATA(sse2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0),
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 111 setOperationAction(ISD::MULHU, MVT::i32, Legal);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.cpp | 107 setOperationAction(ISD::MULHU, VT, Expand);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 117 setOperationAction(ISD::MULHU, T, Custom); 179 setOperationAction(ISD::MULHU, T, Custom); 2076 case ISD::MULHU: 2116 case ISD::MULHU: return LowerHvxMulh(Op, DAG);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 232 case ISD::MULHU: return "mulhu";
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H A D | LegalizeDAG.cpp | 3270 case ISD::MULHU: 3273 Node->getOpcode() == ISD::MULHU ? ISD::UMUL_LOHI : ISD::SMUL_LOHI; 3288 Node->getOpcode() == ISD::UMUL_LOHI ? ISD::MULHU : ISD::MULHS; 3326 bool HasMULHU = TLI.isOperationLegalOrCustom(ISD::MULHU, VT);
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H A D | LegalizeVectorOps.cpp | 367 case ISD::MULHU:
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H A D | TargetLowering.cpp | 5360 if (isOperationLegalOrCustom(ISD::MULHU, VT, IsAfterLegalization)) 5361 return DAG.getNode(ISD::MULHU, dl, VT, X, Y); 5382 // MULHU to act as a SRL-by-1 for NPQ, else multiply by zero. 6265 isOperationLegalOrCustom(ISD::MULHU, HiLoVT); 6291 Hi = DAG.getNode(Signed ? ISD::MULHS : ISD::MULHU, dl, HiLoVT, L, R); 8135 unsigned HiOp = Signed ? ISD::MULHS : ISD::MULHU; 8406 { { ISD::MULHU, ISD::UMUL_LOHI, ISD::ZERO_EXTEND },
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 123 setOperationAction(ISD::MULHU, MVT::i8, Promote); 128 setOperationAction(ISD::MULHU, MVT::i16, Expand);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 114 setOperationAction(ISD::MULHU, MVT::i32, Expand);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 179 setOperationAction(ISD::MULHU, VT, Expand);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.cpp | 1010 if (TLI->isOperationLegalOrCustom(ISD::MULHU, VT)) {
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 100 setOperationAction(ISD::MULHU, MVT::i32, Expand);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1657 setOperationAction(ISD::MULHU, MVT::i32, Expand); 1680 setOperationAction(ISD::MULHU, MVT::i64, Expand);
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