| /netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/arm/ |
| H A D | mrs-msr-arm-v7-a-bad.d | 1 # name: MRS/MSR negative test, architecture v7-A, ARM mode
|
| H A D | mrs-msr-thumb-v7-m-bad.d | 1 # name: MRS/MSR negative test, architecture v7-M, Thumb mode
|
| H A D | msr-imm-bad.d | 1 # name: Cannot use MSR with immediates in thumb mode.
|
| H A D | mrs-msr-arm-v6.d | 2 #name: MRS/MSR test, architecture v6, ARM mode
|
| H A D | mrs-msr-arm-v7-a.d | 2 #name: MRS/MSR test, architecture v7-A, ARM mode
|
| H A D | mrs-msr-thumb-v6t2.d | 2 #name: MRS/MSR test, architecture v6t2, Thumb mode
|
| H A D | mrs-msr-thumb-v7-m.d | 2 #name: MRS/MSR test, architecture v7-M, Thumb mode
|
| H A D | mrs-msr-thumb-v7e-m.d | 2 #name: MRS/MSR test, architecture v7e-M, Thumb mode
|
| H A D | archv8m-cmse-msr.s | 57 ## MSR ##
|
| H A D | msr-imm.s | 1 @ Check MSR and MRS instruction operand syntax.
2 @ Also check for MSR/MRS acceptance in ARM/THUMB modes.
|
| H A D | msr-reg.s | 1 @ Check MSR and MRS instruction operand syntax.
2 @ Also check for MSR/MRS acceptance in ARM/THUMB modes.
|
| /netbsd-current/sys/arch/powerpc/oea/ |
| H A D | kgdb_glue.c | 78 kgdbregs[MSR] &= ~PSL_BE;
83 kgdbregs[MSR] &= ~PSL_SE;
86 kgdbregs[MSR] |= PSL_SE;
|
| /netbsd-current/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/cert/ |
| H A D | PutenvWithAutoChecker.cpp | 46 const MemSpaceRegion *MSR = ArgV.getAsRegion()->getMemorySpace(); local
48 if (!isa<StackSpaceRegion>(MSR))
|
| /netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/aarch64/ |
| H A D | armv8_4-a-registers.s | 39 MSR DIT, #01
40 MSR DIT, #00
41 MSR DIT, X3
42 MSR DIT, X11
43 MSR DIT, X15
|
| H A D | sysreg-4.s | 29 # MSR (register)
40 # MSR (immediate)
|
| H A D | armv8_4-a-registers-illegal.s | 27 MSR DIT, #01 label
28 MSR DIT, W0 label
|
| /netbsd-current/external/gpl3/gdb.old/dist/sim/microblaze/ |
| H A D | microblaze.h | 50 #define MSR CPU.spregs[1] macro
72 #define C_rd ((MSR & 0x4) >> 2)
73 #define C_wr(D) MSR = (D ? MSR | 0x80000004 : MSR & 0x7FFFFFFB)
|
| /netbsd-current/external/gpl3/gdb/dist/sim/microblaze/ |
| H A D | microblaze.h | 50 #define MSR CPU.spregs[1] macro
72 #define C_rd ((MSR & 0x4) >> 2)
73 #define C_wr(D) MSR = (D ? MSR | 0x80000004 : MSR & 0x7FFFFFFB)
|
| /netbsd-current/sys/arch/bebox/include/ |
| H A D | kgdb.h | 40 #define MSR 37 macro
|
| /netbsd-current/sys/arch/prep/include/ |
| H A D | kgdb.h | 40 #define MSR 37 macro
|
| /netbsd-current/sys/arch/rs6000/include/ |
| H A D | kgdb.h | 40 #define MSR 37 macro
|
| /netbsd-current/sys/arch/sandpoint/include/ |
| H A D | kgdb.h | 40 #define MSR 37 macro
|
| /netbsd-current/sys/arch/mvmeppc/include/ |
| H A D | kgdb.h | 40 #define MSR 37 macro
|
| /netbsd-current/sys/arch/ibmnws/include/ |
| H A D | kgdb.h | 40 #define MSR 37 macro
|
| /netbsd-current/sys/arch/sparc64/sparc64/ |
| H A D | bsd_fdintr.s | 98 ld [R_fdc + FDC_REG_MSR], R_msr ! get chip MSR reg addr
115 ldub [R_msr], %l7 ! get MSR value
141 ldub [R_msr], %l7 ! get MSR value
|