Searched refs:MPCC1_MPCC_TOP_SEL__MPCC_TOP_SEL_MASK (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h18904 #define MPCC1_MPCC_TOP_SEL__MPCC_TOP_SEL_MASK macro
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H A Ddcn_2_1_0_sh_mask.h20271 #define MPCC1_MPCC_TOP_SEL__MPCC_TOP_SEL_MASK macro
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H A Ddcn_2_0_0_sh_mask.h23339 #define MPCC1_MPCC_TOP_SEL__MPCC_TOP_SEL_MASK macro
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