/netbsd-current/share/i18n/esdb/MISC/ |
H A D | Makefile.inc | 3 .PATH: ${.CURDIR}/MISC 7 ${.CURDIR}/MISC/esdb.dir.MISC.src 10 SRC_esdb.dir+= esdb.dir.MISC.src 11 SRC_esdb.alias+= esdb.alias.MISC.src 15 FILESDIR_$i:= ${BINDIR}/MISC
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/netbsd-current/share/i18n/csmapper/MISC/ |
H A D | Makefile.inc | 3 .PATH: ${.CURDIR}/MISC 5 SRCS_mapper.dir+= mapper.dir.MISC 6 SRCS_charset.pivot+= charset.pivot.MISC 7 CLEANFILES+= mapper.dir.MISC charset.pivot.MISC 23 mapper.dir.MISC: ${.CURDIR}/MISC/mapper.dir.MISC.src 25 (echo "# MISC" ; cat ${.ALLSRC} ; echo ) > ${.TARGET} 27 charset.pivot.MISC [all...] |
/netbsd-current/sys/external/bsd/acpica/dist/generate/unix/ |
H A D | Makefile.rules | 7 # Note: $(INTERMEDIATES) and $(MISC) are used for iASL compiler only. 13 $(PROG) : $(INTERMEDIATES) $(MISC) $(OBJECTS) 23 @rm -f $(PROG) $(PROG).exe $(OBJECTS) $(OBJDIR)/*.o $(INTERMEDIATES) $(MISC)
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/netbsd-current/share/i18n/csmapper/ |
H A D | Makefile | 14 JIS KAZAKH KOI KS MISC TCVN
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/netbsd-current/share/i18n/esdb/ |
H A D | Makefile | 16 ISO-8859 ISO646 KAZAKH KOI MISC TCVN UTF
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/netbsd-current/external/gpl3/binutils/dist/opcodes/ |
H A D | nds32-asm.c | 417 /* seg-MISC. */ 418 {"standby", "%stdby_st", MISC (STANDBY), 4, ATTR_ALL, 0, NULL, 0, NULL}, 419 {"mfsr", "=rt,%sr", MISC (MFSR), 4, ATTR_ALL, 0, NULL, 0, NULL}, 420 {"iret", "", MISC (IRET), 4, ATTR_ALL, 0, NULL, 0, NULL}, 421 {"trap", "%swid", MISC (TRAP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 422 {"teqz", "%rt{,%swid}", MISC (TEQZ), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 423 {"tnez", "%rt{,%swid}", MISC (TNEZ), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 424 {"dsb", "", MISC (DSB), 4, ATTR_ALL, 0, NULL, 0, NULL}, 425 {"isb", "", MISC (ISB), 4, ATTR_ALL, 0, NULL, 0, NULL}, 426 {"break", "%swid", MISC (BREA [all...] |
H A D | arc-nps400-tbl.h | 919 { "whash", 0x38150000, 0xf8ff0000, ARC_OPCODE_ARC700, MISC, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RC }, { 0 }}, 922 { "whash", 0x3815003e, 0xf8ff003f, ARC_OPCODE_ARC700, MISC, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RC }, { 0 }}, 925 { "whash", 0x38550000, 0xf8ff0000, ARC_OPCODE_ARC700, MISC, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, NPS_WHASH_SIZE }, { 0 }}, 928 { "whash", 0x3855003e, 0xf8ff003f, ARC_OPCODE_ARC700, MISC, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, NPS_WHASH_SIZE }, { 0 }}, 931 { "mcmp", 0x48024000, 0xf81fdf7f, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_R_SRC2_3B }, { C_NPS_SR, C_NPS_M }}, 934 { "mcmp", 0x48020000, 0xf81fdf7f, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_R_SRC2_3B }, { C_NPS_SR, C_NPS_M }}, 937 { "mcmp", 0x48024000, 0xf81fc000, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, 941 { "mcmp", 0x4802c000, 0xf81fcf00, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_MISC_IMM_SIZE }, { C_NPS_SR, C_NPS_M }}, 944 { "mcmp", 0x4802c000, 0xf81fc000, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, 948 { "mcmp", 0x48028000, 0xf81fdf00, ARC_OPCODE_ARC700, MISC, NPS40 [all...] |
H A D | nds32-asm.h | 295 #define MISC(sub) (OP6 (MISC) | N32_MISC_ ## sub) macro
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H A D | nds32-dis.c | 520 case MISC (STANDBY): 559 case MISC (IRET): 560 case MISC (ISB): 561 case MISC (DSB): 930 case MISC (CCTL):
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/netbsd-current/external/gpl3/binutils.old/dist/opcodes/ |
H A D | nds32-asm.c | 417 /* seg-MISC. */ 418 {"standby", "%stdby_st", MISC (STANDBY), 4, ATTR_ALL, 0, NULL, 0, NULL}, 419 {"mfsr", "=rt,%sr", MISC (MFSR), 4, ATTR_ALL, 0, NULL, 0, NULL}, 420 {"iret", "", MISC (IRET), 4, ATTR_ALL, 0, NULL, 0, NULL}, 421 {"trap", "%swid", MISC (TRAP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 422 {"teqz", "%rt{,%swid}", MISC (TEQZ), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 423 {"tnez", "%rt{,%swid}", MISC (TNEZ), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 424 {"dsb", "", MISC (DSB), 4, ATTR_ALL, 0, NULL, 0, NULL}, 425 {"isb", "", MISC (ISB), 4, ATTR_ALL, 0, NULL, 0, NULL}, 426 {"break", "%swid", MISC (BREA [all...] |
H A D | arc-nps400-tbl.h | 919 { "whash", 0x38150000, 0xf8ff0000, ARC_OPCODE_ARC700, MISC, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RC }, { 0 }}, 922 { "whash", 0x3815003e, 0xf8ff003f, ARC_OPCODE_ARC700, MISC, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RC }, { 0 }}, 925 { "whash", 0x38550000, 0xf8ff0000, ARC_OPCODE_ARC700, MISC, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, NPS_WHASH_SIZE }, { 0 }}, 928 { "whash", 0x3855003e, 0xf8ff003f, ARC_OPCODE_ARC700, MISC, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, NPS_WHASH_SIZE }, { 0 }}, 931 { "mcmp", 0x48024000, 0xf81fdf7f, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_R_SRC2_3B }, { C_NPS_SR, C_NPS_M }}, 934 { "mcmp", 0x48020000, 0xf81fdf7f, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_R_SRC2_3B }, { C_NPS_SR, C_NPS_M }}, 937 { "mcmp", 0x48024000, 0xf81fc000, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, 941 { "mcmp", 0x4802c000, 0xf81fcf00, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_MISC_IMM_SIZE }, { C_NPS_SR, C_NPS_M }}, 944 { "mcmp", 0x4802c000, 0xf81fc000, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, 948 { "mcmp", 0x48028000, 0xf81fdf00, ARC_OPCODE_ARC700, MISC, NPS40 [all...] |
H A D | nds32-asm.h | 287 #define MISC(sub) (OP6 (MISC) | N32_MISC_ ## sub) macro
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H A D | nds32-dis.c | 528 case MISC (STANDBY): 567 case MISC (IRET): 568 case MISC (ISB): 569 case MISC (DSB): 938 case MISC (CCTL):
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/netbsd-current/external/gpl3/gdb.old/dist/opcodes/ |
H A D | nds32-asm.c | 417 /* seg-MISC. */ 418 {"standby", "%stdby_st", MISC (STANDBY), 4, ATTR_ALL, 0, NULL, 0, NULL}, 419 {"mfsr", "=rt,%sr", MISC (MFSR), 4, ATTR_ALL, 0, NULL, 0, NULL}, 420 {"iret", "", MISC (IRET), 4, ATTR_ALL, 0, NULL, 0, NULL}, 421 {"trap", "%swid", MISC (TRAP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 422 {"teqz", "%rt{,%swid}", MISC (TEQZ), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 423 {"tnez", "%rt{,%swid}", MISC (TNEZ), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 424 {"dsb", "", MISC (DSB), 4, ATTR_ALL, 0, NULL, 0, NULL}, 425 {"isb", "", MISC (ISB), 4, ATTR_ALL, 0, NULL, 0, NULL}, 426 {"break", "%swid", MISC (BREA [all...] |
H A D | arc-nps400-tbl.h | 919 { "whash", 0x38150000, 0xf8ff0000, ARC_OPCODE_ARC700, MISC, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RC }, { 0 }}, 922 { "whash", 0x3815003e, 0xf8ff003f, ARC_OPCODE_ARC700, MISC, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RC }, { 0 }}, 925 { "whash", 0x38550000, 0xf8ff0000, ARC_OPCODE_ARC700, MISC, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, NPS_WHASH_SIZE }, { 0 }}, 928 { "whash", 0x3855003e, 0xf8ff003f, ARC_OPCODE_ARC700, MISC, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, NPS_WHASH_SIZE }, { 0 }}, 931 { "mcmp", 0x48024000, 0xf81fdf7f, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_R_SRC2_3B }, { C_NPS_SR, C_NPS_M }}, 934 { "mcmp", 0x48020000, 0xf81fdf7f, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_R_SRC2_3B }, { C_NPS_SR, C_NPS_M }}, 937 { "mcmp", 0x48024000, 0xf81fc000, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, 941 { "mcmp", 0x4802c000, 0xf81fcf00, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_MISC_IMM_SIZE }, { C_NPS_SR, C_NPS_M }}, 944 { "mcmp", 0x4802c000, 0xf81fc000, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, 948 { "mcmp", 0x48028000, 0xf81fdf00, ARC_OPCODE_ARC700, MISC, NPS40 [all...] |
H A D | nds32-asm.h | 287 #define MISC(sub) (OP6 (MISC) | N32_MISC_ ## sub) macro
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H A D | nds32-dis.c | 528 case MISC (STANDBY): 567 case MISC (IRET): 568 case MISC (ISB): 569 case MISC (DSB): 938 case MISC (CCTL):
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/netbsd-current/external/gpl3/gdb/dist/opcodes/ |
H A D | nds32-asm.c | 417 /* seg-MISC. */ 418 {"standby", "%stdby_st", MISC (STANDBY), 4, ATTR_ALL, 0, NULL, 0, NULL}, 419 {"mfsr", "=rt,%sr", MISC (MFSR), 4, ATTR_ALL, 0, NULL, 0, NULL}, 420 {"iret", "", MISC (IRET), 4, ATTR_ALL, 0, NULL, 0, NULL}, 421 {"trap", "%swid", MISC (TRAP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 422 {"teqz", "%rt{,%swid}", MISC (TEQZ), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 423 {"tnez", "%rt{,%swid}", MISC (TNEZ), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL}, 424 {"dsb", "", MISC (DSB), 4, ATTR_ALL, 0, NULL, 0, NULL}, 425 {"isb", "", MISC (ISB), 4, ATTR_ALL, 0, NULL, 0, NULL}, 426 {"break", "%swid", MISC (BREA [all...] |
H A D | arc-nps400-tbl.h | 919 { "whash", 0x38150000, 0xf8ff0000, ARC_OPCODE_ARC700, MISC, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RC }, { 0 }}, 922 { "whash", 0x3815003e, 0xf8ff003f, ARC_OPCODE_ARC700, MISC, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RC }, { 0 }}, 925 { "whash", 0x38550000, 0xf8ff0000, ARC_OPCODE_ARC700, MISC, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, NPS_WHASH_SIZE }, { 0 }}, 928 { "whash", 0x3855003e, 0xf8ff003f, ARC_OPCODE_ARC700, MISC, NPS400, { ZA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, NPS_WHASH_SIZE }, { 0 }}, 931 { "mcmp", 0x48024000, 0xf81fdf7f, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_R_SRC2_3B }, { C_NPS_SR, C_NPS_M }}, 934 { "mcmp", 0x48020000, 0xf81fdf7f, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_R_SRC2_3B }, { C_NPS_SR, C_NPS_M }}, 937 { "mcmp", 0x48024000, 0xf81fc000, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, 941 { "mcmp", 0x4802c000, 0xf81fcf00, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, BRAKETdup, BRAKET, NPS_CM, COLON, NPS_R_SRC2_3B, BRAKETdup, NPS_MISC_IMM_SIZE }, { C_NPS_SR, C_NPS_M }}, 944 { "mcmp", 0x4802c000, 0xf81fc000, ARC_OPCODE_ARC700, MISC, NPS400, { NPS_R_DST_3B, BRAKET, NPS_CM, COLON, NPS_DPI_SRC1_3B, 948 { "mcmp", 0x48028000, 0xf81fdf00, ARC_OPCODE_ARC700, MISC, NPS40 [all...] |
H A D | nds32-asm.h | 295 #define MISC(sub) (OP6 (MISC) | N32_MISC_ ## sub) macro
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H A D | nds32-dis.c | 520 case MISC (STANDBY): 559 case MISC (IRET): 560 case MISC (ISB): 561 case MISC (DSB): 930 case MISC (CCTL):
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/netbsd-current/external/gpl2/xcvs/dist/src/ |
H A D | ls.c | 230 err += do_module (db, mod, MISC, "Listing", 241 err += do_module (db, topmod, MISC, "Listing",
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H A D | annotate.c | 144 err += do_module (db, argv[i], MISC, "Annotating", rannotate_proc,
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/netbsd-current/external/public-domain/tz/dist/ |
H A D | Makefile | 601 MISC= $(AWK_SCRIPTS) macro 608 TZDATA_DIST = $(COMMON) $(DATA) $(MISC) 874 $(MISC) $(SOURCES) $(WEB_PAGES) \
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/netbsd-current/lib/libc/time/ |
H A D | Makefile | 601 MISC= $(AWK_SCRIPTS) macro 608 TZDATA_DIST = $(COMMON) $(DATA) $(MISC) 874 $(MISC) $(SOURCES) $(WEB_PAGES) \
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