/netbsd-current/sys/arch/arc/arc/ |
H A D | p_sni_rm200pci.c | 95 [IPL_VM] = MIPS_INT_MASK, /* XXX */ 96 [IPL_SCHED] = MIPS_INT_MASK, 97 [IPL_DDB] = MIPS_INT_MASK, 98 [IPL_HIGH] = MIPS_INT_MASK,
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H A D | p_dti_tyne.c | 114 [IPL_VM] = MIPS_INT_MASK, /* XXX */ 115 [IPL_SCHED] = MIPS_INT_MASK, 116 [IPL_DDB] = MIPS_INT_MASK, 117 [IPL_HIGH] = MIPS_INT_MASK,
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H A D | p_dti_arcstation.c | 111 [IPL_VM] = MIPS_INT_MASK, /* XXX */ 112 [IPL_SCHED] = MIPS_INT_MASK, 113 [IPL_DDB] = MIPS_INT_MASK, 114 [IPL_HIGH] = MIPS_INT_MASK,
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H A D | c_magnum.c | 99 [IPL_SCHED] = MIPS_INT_MASK, 100 [IPL_DDB] = MIPS_INT_MASK, 101 [IPL_HIGH] = MIPS_INT_MASK,
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H A D | c_nec_eisa.c | 120 [IPL_SCHED] = MIPS_INT_MASK, 121 [IPL_DDB] = MIPS_INT_MASK, 122 [IPL_HIGH] = MIPS_INT_MASK,
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H A D | c_nec_pci.c | 125 [IPL_SCHED] = MIPS_INT_MASK, 126 [IPL_DDB] = MIPS_INT_MASK, 127 [IPL_HIGH] = MIPS_INT_MASK,
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/netbsd-current/sys/arch/mips/include/ |
H A D | psl.h | 69 #define MIPS1_PSL_LOWIPL (MIPS_INT_MASK | MIPS_SR_INT_IE) 76 MIPS_INT_MASK)
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/netbsd-current/sys/arch/hpcmips/vr/ |
H A D | vrip_spl.S | 65 li v1, ~MIPS_INT_MASK
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/netbsd-current/sys/arch/mipsco/mipsco/ |
H A D | interrupt.c | 65 [IPL_HIGH] = MIPS_INT_MASK,
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/netbsd-current/sys/arch/emips/include/ |
H A D | intr.h | 49 #define MIPS_SPLHIGH (MIPS_INT_MASK)
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/netbsd-current/sys/arch/pmax/include/ |
H A D | intr.h | 44 #define MIPS_SPLHIGH (MIPS_INT_MASK)
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/netbsd-current/sys/arch/algor/algor/ |
H A D | algor_intr.c | 80 [IPL_SCHED] = MIPS_INT_MASK, 81 [IPL_HIGH] = MIPS_INT_MASK,
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/netbsd-current/sys/arch/mips/mips/ |
H A D | spl.S | 53 .word MIPS_INT_MASK /* IPL_VM */ 54 .word MIPS_INT_MASK /* IPL_SCHED */ 55 .word MIPS_INT_MASK /* IPL_DDB */ 56 .word MIPS_INT_MASK /* IPL_HIGH */ 80 or v1, MIPS_INT_MASK # enable all interrupts 137 xor a1, MIPS_INT_MASK # invert SR bits 163 and v1, MIPS_INT_MASK 164 xor a1, MIPS_INT_MASK 176 xor v1, MIPS_INT_MASK # invert 260 and a0, v1, MIPS_INT_MASK # selec [all...] |
H A D | mips_machdep.c | 2146 | (ipl_sr_map.sr_bits[IPL_SCHED] ^ MIPS_INT_MASK); 2379 status = mips_cp0_status_read() & MIPS_INT_MASK; 2380 KASSERT(status == MIPS_INT_MASK); 2384 status = mips_cp0_status_read() & MIPS_INT_MASK; 2385 KASSERT((status ^ sr_map[IPL_SOFTCLOCK]) == MIPS_INT_MASK); 2390 status = mips_cp0_status_read() & MIPS_INT_MASK; 2391 KASSERT((status ^ sr_map[IPL_SOFTBIO]) == MIPS_INT_MASK); 2396 status = mips_cp0_status_read() & MIPS_INT_MASK; 2397 KASSERT((status ^ sr_map[IPL_SOFTNET]) == MIPS_INT_MASK); 2402 status = mips_cp0_status_read() & MIPS_INT_MASK; [all...] |
/netbsd-current/sys/arch/evbmips/mipssim/ |
H A D | mipssim_intr.c | 58 [IPL_DDB] = MIPS_INT_MASK, 59 [IPL_HIGH] = MIPS_INT_MASK,
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/netbsd-current/sys/arch/ews4800mips/ews4800mips/ |
H A D | tr2a_intr.c | 56 [IPL_VM] = MIPS_INT_MASK & ~MIPS_INT_MASK_5, 57 [IPL_SCHED] = MIPS_INT_MASK, 58 [IPL_DDB] = MIPS_INT_MASK, 59 [IPL_HIGH] = MIPS_INT_MASK,
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/netbsd-current/sys/arch/emips/emips/ |
H A D | xs_bee3.c | 60 #define NOINTS MIPS_INT_MASK
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H A D | xilinx_ml40x.c | 62 #define NOINTS MIPS_INT_MASK
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/netbsd-current/sys/arch/mips/ralink/ |
H A D | ralink_intr.c | 61 [IPL_VM] = MIPS_INT_MASK ^ MIPS_INT_MASK_5, 62 [IPL_SCHED] = MIPS_INT_MASK, 63 [IPL_DDB] = MIPS_INT_MASK, 64 [IPL_HIGH] = MIPS_INT_MASK,
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/netbsd-current/sys/arch/mips/adm5120/ |
H A D | adm5120_intr.c | 98 [IPL_SCHED] = MIPS_INT_MASK, 99 [IPL_HIGH] = MIPS_INT_MASK,
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/netbsd-current/sys/arch/newsmips/newsmips/ |
H A D | news5000.c | 73 [IPL_DDB] = MIPS_INT_MASK, 74 [IPL_HIGH] = MIPS_INT_MASK,
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H A D | news4000.c | 68 [IPL_DDB] = MIPS_INT_MASK, 69 [IPL_HIGH] = MIPS_INT_MASK,
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/netbsd-current/sys/arch/cobalt/cobalt/ |
H A D | interrupt.c | 149 [IPL_VM] = MIPS_INT_MASK ^ MIPS_INT_MASK_5, 150 [IPL_SCHED] = MIPS_INT_MASK, 151 [IPL_DDB] = MIPS_INT_MASK, 152 [IPL_HIGH] = MIPS_INT_MASK,
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/netbsd-current/sys/arch/pmax/pmax/ |
H A D | dec_maxine.c | 127 [IPL_SCHED] = MIPS_INT_MASK, 128 [IPL_DDB] = MIPS_INT_MASK, 129 [IPL_HIGH] = MIPS_INT_MASK,
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/netbsd-current/sys/arch/mips/atheros/ |
H A D | ar5312.c | 380 [IPL_SCHED] = MIPS_INT_MASK, 381 [IPL_DDB] = MIPS_INT_MASK, 382 [IPL_HIGH] = MIPS_INT_MASK,
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