Searched refs:MC_SEQ_RESERVE_0_S__MCLK_GCK_SEL__SHIFT (Results 1 - 1 of 1) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_1_sh_mask.h8688 #define MC_SEQ_RESERVE_0_S__MCLK_GCK_SEL__SHIFT 0x0 macro

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