Searched refs:MC_DLB_MISCCTRL2__SEL_PHY_PRBS_CHK_MASK (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_1_sh_mask.h14113 #define MC_DLB_MISCCTRL2__SEL_PHY_PRBS_CHK_MASK 0x10000000 macro
H A Dgmc_8_1_sh_mask.h15027 #define MC_DLB_MISCCTRL2__SEL_PHY_PRBS_CHK_MASK 0x10000000 macro

Completed in 505 milliseconds