Searched refs:IOASIC_CSR (Results 1 - 12 of 12) sorted by relevance

/netbsd-current/sys/arch/pmax/tc/
H A Dasc_ioasic.c200 ssr = bus_space_read_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR);
202 bus_space_write_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR, ssr);
233 ssr = bus_space_read_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR);
235 bus_space_write_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR, ssr);
294 ssr = bus_space_read_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR);
300 bus_space_write_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR, ssr);
301 ssr = bus_space_read_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR);
304 bus_space_write_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR, ssr);
333 ssr = bus_space_read_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR);
335 bus_space_write_4(asc->sc_bst, asc->sc_bsh, IOASIC_CSR, ss
[all...]
/netbsd-current/sys/dev/tc/
H A Dbba.c244 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
248 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
260 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
361 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
363 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
387 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
389 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
430 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
432 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
465 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ss
[all...]
H A Dioasicreg.h105 #define IOASIC_CSR IOASIC_SLOT_1_START+0x100 macro
H A Dif_le_ioasic.c153 ssr = bus_space_read_4(ioasic_bst, ioasic_bsh, IOASIC_CSR);
155 bus_space_write_4(ioasic_bst, ioasic_bsh, IOASIC_CSR, ssr);
H A Dxcfb.c336 csr = (volatile uint32_t *)((char *)base + IOASIC_CSR);
/netbsd-current/sys/arch/pmax/pmax/
H A Dkn03.h140 #define KN03_REG_CSR ( KN03_SYS_ASIC + IOASIC_CSR )
H A Ddec_3maxplus.c167 *(volatile uint32_t *)(ioasic_base + IOASIC_CSR) = 0x00000f00;
171 *(volatile uint32_t *)(ioasic_base + IOASIC_CSR) |= 0x100;
H A Dkmin.h181 #define KMIN_REG_CSR ( KMIN_SYS_ASIC + IOASIC_CSR )
H A Dmaxine.h188 #define XINE_REG_CSR ( XINE_SYS_ASIC + IOASIC_CSR )
H A Ddec_maxine.c163 *(volatile uint32_t *)(ioasic_base + IOASIC_CSR) = 0x00001fc1;
H A Ddec_3min.c165 *(volatile uint32_t *)(ioasic_base + IOASIC_CSR) = 0x00000f00;
/netbsd-current/sys/arch/alpha/tc/
H A Dioasic.c173 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
175 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);

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