Searched refs:ICU_OFFSET (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/arch/arm/footbridge/isa/
H A Dicu.h67 #define ICU_OFFSET 32 /* 0-31 are processor exceptions */ macro
H A Disa_machdep.c126 outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */
141 outb(IO_ICU2+1, ICU_OFFSET+8); /* staring at this vector index */
/netbsd-current/sys/arch/shark/isa/
H A Dicu.h67 #define ICU_OFFSET 32 /* 0-31 are processor exceptions */ macro
H A Disa_shark_machdep.c125 outb(IO_ICU1+1, ICU_OFFSET); /* int base: not used */
133 outb(IO_ICU2+1, ICU_OFFSET+8); /* int base + offset for master: not used */
/netbsd-current/sys/arch/atari/isa/
H A Disa_milan.c57 #define ICU_OFFSET 0 /* Interrupt vector base */ macro
76 icu[1] = ICU_OFFSET; /* starting at this vector index */
86 icu[1] = ICU_OFFSET + 8; /* starting at this vector index */
/netbsd-current/sys/arch/x86/x86/
H A Di8259.c140 outb(IO_ICU1 + PIC_ICW2, ICU_OFFSET);
174 outb(IO_ICU2 + PIC_ICW2, ICU_OFFSET + 8);
H A Dintr.c275 idt_vec_reserve(iv, ICU_OFFSET + i);
276 idt_vec_set(iv, ICU_OFFSET + i, legacy_stubs[i].ist_entry);
608 idtvec = ICU_OFFSET + pin;
/netbsd-current/sys/arch/x86/include/
H A Di8259.h65 #define ICU_OFFSET 32 /* 0-31 are processor exceptions */ macro

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