| /netbsd-current/external/gpl3/binutils/dist/opcodes/ |
| H A D | s390-opc.c | 97 #define F_28 (F_24 + 1) /* FPR starting at position 28 */ macro
99 #define F_32 (F_28 + 1) /* FPR starting at position 32 */
358 #define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */
359 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } /* e.g. lxdbr */
364 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */
371 #define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */
372 #define INSTR_RRF_FE0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. myr */
373 #define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */
376 #define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */
378 #define INSTR_RRF_FUFF2 4, { F_24,F_28,F_1
[all...] |
| /netbsd-current/external/gpl3/gdb.old/dist/opcodes/ |
| H A D | s390-opc.c | 89 #define F_28 19 /* FPR starting at position 28 */ macro
336 #define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */
337 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } /* e.g. lxdbr */
342 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */
349 #define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */
350 #define INSTR_RRF_FE0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. myr */
351 #define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */
354 #define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */
356 #define INSTR_RRF_FUFF2 4, { F_24,F_28,F_16,U4_20,0,0 } /* e.g. adtra */
363 #define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,
[all...] |
| /netbsd-current/external/gpl3/gdb/dist/opcodes/ |
| H A D | s390-opc.c | 89 #define F_28 19 /* FPR starting at position 28 */ macro
339 #define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */
340 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } /* e.g. lxdbr */
345 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */
352 #define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */
353 #define INSTR_RRF_FE0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. myr */
354 #define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */
357 #define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */
359 #define INSTR_RRF_FUFF2 4, { F_24,F_28,F_16,U4_20,0,0 } /* e.g. adtra */
367 #define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,
[all...] |
| /netbsd-current/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | s390-opc.c | 89 #define F_28 19 /* FPR starting at position 28 */ macro
339 #define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */
340 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } /* e.g. lxdbr */
345 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */
352 #define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */
353 #define INSTR_RRF_FE0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. myr */
354 #define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */
357 #define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */
359 #define INSTR_RRF_FUFF2 4, { F_24,F_28,F_16,U4_20,0,0 } /* e.g. adtra */
367 #define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,
[all...] |