Searched refs:EVT (Results 1 - 25 of 266) sorted by relevance

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/netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DRuntimeLibcalls.h38 Libcall getFPEXT(EVT OpVT, EVT RetVT);
42 Libcall getFPROUND(EVT OpVT, EVT RetVT);
46 Libcall getFPTOSINT(EVT OpVT, EVT RetVT);
50 Libcall getFPTOUINT(EVT OpVT, EVT RetVT);
54 Libcall getSINTTOFP(EVT OpVT, EVT RetV
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H A DValueTypes.h35 struct EVT { struct in namespace:llvm
41 constexpr EVT() = default;
42 constexpr EVT(MVT::SimpleValueType SVT) : V(SVT) {} function in struct:llvm::EVT
43 constexpr EVT(MVT S) : V(S) {} function in struct:llvm::EVT
45 bool operator==(EVT VT) const {
48 bool operator!=(EVT VT) const {
56 /// Returns the EVT that represents a floating-point type with the given
59 static EVT getFloatingPointVT(unsigned BitWidth) {
63 /// Returns the EVT that represents an integer with the given number of
65 static EVT getIntegerV
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H A DSelectionDAG.h96 const EVT *VTs;
103 SDVTListNode(const FoldingSetNodeIDRef ID, const EVT *VT, unsigned int Num) :
395 SDVTList VTs, EVT MemoryVT,
602 SDVTList getVTList(EVT VT);
603 SDVTList getVTList(EVT VT1, EVT VT2);
604 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3);
605 SDVTList getVTList(EVT VT
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H A DAnalysis.h33 struct EVT;
69 SmallVectorImpl<EVT> &ValueVTs,
75 SmallVectorImpl<EVT> &ValueVTs,
76 SmallVectorImpl<EVT> *MemVTs,
H A DTargetLowering.h225 /// LegalizeKind holds the legalization kind that needs to happen to EVT
227 using LegalizeKind = std::pair<LegalizeTypeAction, EVT>;
375 /// EVT is not used in-tree, but is used by out-of-tree target.
377 virtual MVT getScalarShiftAmountTy(const DataLayout &, EVT) const;
379 EVT getShiftAmountTy(EVT LHSTy, const DataLayout &DL,
418 virtual bool reduceSelectOfFPConstantLoads(EVT CmpOpVT) const {
459 shouldExpandBuildVectorWithShuffles(EVT /* VT */,
468 virtual bool isIntDivCheap(EVT VT, AttributeList Attr) const { return false; }
471 virtual bool hasStandaloneRem(EVT V
1617 allowsMisalignedMemoryAccesses( EVT, unsigned AddrSpace = 0, Align Alignment = Align(1), MachineMemOperand::Flags Flags = MachineMemOperand::MONone, bool * = nullptr) const argument
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H A DTargetCallingConv.h198 EVT ArgVT;
212 InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used,
236 EVT ArgVT;
250 OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed,
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFISelLowering.h64 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
65 EVT VT) const override;
67 MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override;
108 EVT getOptimalMemOpType(const MemOp &Op,
113 bool isIntDivCheap(EVT VT, AttributeList Attr) const override { return true; }
129 EVT NewVT) const override {
137 bool isTruncateFree(EVT VT1, EVT VT2) const override;
141 bool isZExtFree(EVT VT1, EVT VT
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.h74 bool shouldCombineMemoryType(EVT VT) const;
99 static EVT getEquivalentMemType(LLVMContext &Context, EVT VT);
113 std::pair<EVT, EVT> getSplitDestVTs(const EVT &VT, SelectionDAG &DAG) const;
118 const EVT &LoVT, const EVT &HighVT,
153 bool isFAbsFree(EVT VT) const override;
154 bool isFNegFree(EVT V
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H A DR600ISelLowering.h46 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &,
47 EVT VT) const override;
49 bool canMergeStoresTo(unsigned AS, EVT MemVT,
53 EVT VT, unsigned AS, Align Alignment,
63 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT, const SDLoc &DL,
H A DSIISelLowering.h37 EVT VT) const override;
40 EVT VT) const override;
43 LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT,
50 SDValue lowerKernargMemParameter(SelectionDAG &DAG, EVT VT, EVT MemVT,
61 EVT VT,
70 SDValue lowerSBuffer(EVT VT, SDLoc DL, SDValue Rsrc, SDValue Offset,
116 ArrayRef<SDValue> Ops, EVT MemVT,
127 EVT V
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsCallLowering.h39 unsigned ArgLocsStartIndex, const EVT &VT);
47 bool assign(Register VReg, const CCValAssign &VA, const EVT &VT);
53 const EVT &VT) = 0;
61 const EVT &VT) = 0;
/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DValueTypes.cpp1 //===----------- ValueTypes.cpp - Implementation of EVT methods -----------===//
17 EVT EVT::changeExtendedTypeToInteger() const {
23 EVT EVT::changeExtendedVectorElementTypeToInteger() const {
26 EVT IntTy = getIntegerVT(Context, getScalarSizeInBits());
31 EVT EVT::changeExtendedVectorElementType(EVT EltVT) const {
37 EVT EV
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h513 MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
518 EVT VT, unsigned AddrSpace = 0, Align Alignment = Align(1),
541 bool isFPImmLegal(const APFloat &Imm, EVT VT,
546 bool isShuffleMaskLegal(ArrayRef<int> M, EVT VT) const override;
549 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
550 EVT VT) const override;
569 EVT NewVT) const override;
572 bool isTruncateFree(EVT VT1, EVT VT2) const override;
577 bool isZExtFree(EVT VT
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.h906 MVT getScalarShiftAmountTy(const DataLayout &, EVT VT) const override {
929 EVT getOptimalMemOpType(const MemOp &Op,
942 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS, Align Alignment,
962 bool isTypeDesirableForOp(unsigned Opc, EVT VT) const override;
968 bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const override;
987 bool mergeStoresAfterLegalization(EVT MemVT) const override {
991 bool canMergeStoresTo(unsigned AddressSpace, EVT MemVT,
1000 bool hasBitPreservingFPLogic(EVT VT) const override {
1004 bool isMultiStoresCheaperThanBitsMerge(EVT LTy, EVT HT
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp41 EVT OutVT = N->getValueType(0);
42 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
44 EVT InVT = InOp.getValueType();
91 EVT LoVT, HiVT;
106 EVT ElemVT = NOutVT;
107 EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
116 ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits);
117 NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
141 EVT
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H A DLegalizeVectorTypes.cpp219 EVT VT = N->getValueType(0).getVectorElementType();
222 EVT ValueVTs[] = {VT, MVT::Other};
252 EVT ResVT = N->getValueType(0);
253 EVT OvVT = N->getValueType(1);
275 EVT OtherVT = N->getValueType(OtherNo);
299 EVT NewVT = N->getValueType(0).getVectorElementType();
305 EVT EltVT = N->getValueType(0).getVectorElementType();
323 EVT OpVT = Op.getValueType();
329 EVT VT = OpVT.getVectorElementType();
348 EVT EltV
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H A DLegalizeFloatTypes.cpp29 static RTLIB::Libcall GetFPLibCall(EVT VT,
158 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
165 EVT OpVT = N->getOperand(0 + Offset).getValueType();
177 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
185 EVT OpsVT[2] = { N->getOperand(0 + Offset).getValueType(),
201 EVT Ty = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
253 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
314 EVT LVT = LHS.getValueType();
315 EVT RVT = RHS.getValueType();
431 EVT NV
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/netbsd-current/external/gpl3/gdb.old/dist/sim/testsuite/sim/bfin/
H A Dcec-system-call.S9 # This test keeps P5 as the base of the EVT table
/netbsd-current/external/gpl3/gdb/dist/sim/testsuite/bfin/
H A Dcec-system-call.S9 # This test keeps P5 as the base of the EVT table
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h287 bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;
288 bool isZExtFree(SDValue Val, EVT VT2) const override;
289 bool isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const override;
292 bool isFPImmLegal(const APFloat &Imm, EVT VT,
300 EVT VT) const override;
306 EVT VT) const override;
310 bool isShuffleMaskLegal(ArrayRef<int> M, EVT VT) const override;
312 bool hasBitPreservingFPLogic(EVT V
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelLowering.h61 MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
69 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
70 EVT VT) const override;
182 bool isFPImmLegal(const APFloat &Imm, EVT VT,
186 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS, Align A,
205 bool isIntDivCheap(EVT, AttributeList) const override { return false; }
207 bool hasStandaloneRem(EVT) const override { return false; }
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h78 MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
117 bool isTruncateFree(EVT VT1, EVT VT2) const override;
128 bool isZExtFree(EVT VT1, EVT VT2) const override;
129 bool isZExtFree(SDValue Val, EVT VT2) const override;
132 bool shouldAvoidTransformToShift(EVT VT, unsigned Amount) const override;
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h400 MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
426 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &,
427 EVT) const override;
429 EVT VT) const override;
430 bool isFPImmLegal(const APFloat &Imm, EVT VT,
438 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS, Align Alignment,
442 bool isTruncateFree(EVT, EVT) const override;
444 bool shouldFormOverflowOp(unsigned Opcode, EVT VT,
570 const SDLoc &DL, EVT V
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.h403 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
404 EVT VT) const override;
426 bool isDesirableToTransformToIntegerOp(unsigned Opc, EVT VT) const override;
431 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
436 EVT getOptimalMemOpType(const MemOp &Op,
440 bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;
441 bool isZExtFree(SDValue Val, EVT VT2) const override;
446 bool isFNegFree(EVT VT) const override;
467 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT V
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMachineFunctionInfo.cpp38 SmallVector<EVT, 4> VTs;
41 for (EVT VT : VTs) {
115 Params.push_back(EVT(VT).getEVTString());
117 Results.push_back(EVT(VT).getEVTString());

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