| /netbsd-current/external/gpl3/gdb.old/dist/opcodes/ |
| H A D | alpha-opc.c | 52 The information for the EV5 PALcode instructions was compiled from
404 #define EV5 AXP_OPCODE_EV5
1059 { "hw_mfpr", OP(0x19), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } },
1081 { "hw_ldl", EV5HWMEM(0x1B,0x00), EV5, ARG_EV5HWMEM },
1084 { "hw_ldl/a", EV5HWMEM(0x1B,0x10), EV5, ARG_EV5HWMEM },
1086 { "hw_ldl/al", EV5HWMEM(0x1B,0x11), EV5, ARG_EV5HWMEM },
1088 { "hw_ldl/av", EV5HWMEM(0x1B,0x12), EV5, ARG_EV5HWMEM },
1089 { "hw_ldl/avl", EV5HWMEM(0x1B,0x13), EV5, ARG_EV5HWMEM },
1090 { "hw_ldl/aw", EV5HWMEM(0x1B,0x18), EV5, ARG_EV5HWMEM },
1091 { "hw_ldl/awl", EV5HWMEM(0x1B,0x19), EV5, ARG_EV5HWME
401 #define EV5 macro
[all...] |
| /netbsd-current/external/gpl3/gdb/dist/opcodes/ |
| H A D | alpha-opc.c | 52 The information for the EV5 PALcode instructions was compiled from
404 #define EV5 AXP_OPCODE_EV5
1059 { "hw_mfpr", OP(0x19), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } },
1081 { "hw_ldl", EV5HWMEM(0x1B,0x00), EV5, ARG_EV5HWMEM },
1084 { "hw_ldl/a", EV5HWMEM(0x1B,0x10), EV5, ARG_EV5HWMEM },
1086 { "hw_ldl/al", EV5HWMEM(0x1B,0x11), EV5, ARG_EV5HWMEM },
1088 { "hw_ldl/av", EV5HWMEM(0x1B,0x12), EV5, ARG_EV5HWMEM },
1089 { "hw_ldl/avl", EV5HWMEM(0x1B,0x13), EV5, ARG_EV5HWMEM },
1090 { "hw_ldl/aw", EV5HWMEM(0x1B,0x18), EV5, ARG_EV5HWMEM },
1091 { "hw_ldl/awl", EV5HWMEM(0x1B,0x19), EV5, ARG_EV5HWME
401 #define EV5 macro
[all...] |
| /netbsd-current/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | alpha-opc.c | 52 The information for the EV5 PALcode instructions was compiled from
404 #define EV5 AXP_OPCODE_EV5
1059 { "hw_mfpr", OP(0x19), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } },
1081 { "hw_ldl", EV5HWMEM(0x1B,0x00), EV5, ARG_EV5HWMEM },
1084 { "hw_ldl/a", EV5HWMEM(0x1B,0x10), EV5, ARG_EV5HWMEM },
1086 { "hw_ldl/al", EV5HWMEM(0x1B,0x11), EV5, ARG_EV5HWMEM },
1088 { "hw_ldl/av", EV5HWMEM(0x1B,0x12), EV5, ARG_EV5HWMEM },
1089 { "hw_ldl/avl", EV5HWMEM(0x1B,0x13), EV5, ARG_EV5HWMEM },
1090 { "hw_ldl/aw", EV5HWMEM(0x1B,0x18), EV5, ARG_EV5HWMEM },
1091 { "hw_ldl/awl", EV5HWMEM(0x1B,0x19), EV5, ARG_EV5HWME
401 #define EV5 macro
[all...] |
| /netbsd-current/external/gpl3/binutils/dist/opcodes/ |
| H A D | alpha-opc.c | 52 The information for the EV5 PALcode instructions was compiled from
404 #define EV5 AXP_OPCODE_EV5
1059 { "hw_mfpr", OP(0x19), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } },
1081 { "hw_ldl", EV5HWMEM(0x1B,0x00), EV5, ARG_EV5HWMEM },
1084 { "hw_ldl/a", EV5HWMEM(0x1B,0x10), EV5, ARG_EV5HWMEM },
1086 { "hw_ldl/al", EV5HWMEM(0x1B,0x11), EV5, ARG_EV5HWMEM },
1088 { "hw_ldl/av", EV5HWMEM(0x1B,0x12), EV5, ARG_EV5HWMEM },
1089 { "hw_ldl/avl", EV5HWMEM(0x1B,0x13), EV5, ARG_EV5HWMEM },
1090 { "hw_ldl/aw", EV5HWMEM(0x1B,0x18), EV5, ARG_EV5HWMEM },
1091 { "hw_ldl/awl", EV5HWMEM(0x1B,0x19), EV5, ARG_EV5HWME
401 #define EV5 macro
[all...] |
| /netbsd-current/external/lgpl3/gmp/dist/mpn/alpha/ |
| H A D | sqr_diag_addlsh1.asm | 35 C EV5: 10.2
|
| H A D | invert_limb.asm | 35 C EV5: 137/140 (with BWX/without BWX)
|
| H A D | copyd.asm | 35 C EV5: 1.75
|
| H A D | copyi.asm | 35 C EV5: 1.75
|
| H A D | sec_tabselect.asm | 37 C EV5: 2.25
|
| H A D | aorslsh2_n.asm | 35 C EV5: 6
|
| H A D | mod_34lsub1.asm | 35 C EV5: 2.67
|
| H A D | rshift.asm | 35 C EV5: 3.25
|
| H A D | mul_1.asm | 36 C EV5: 18
|
| H A D | submul_1.asm | 36 C EV5: 18
|
| H A D | aorslsh1_n.asm | 35 C EV5: 6.25
|
| H A D | addmul_1.asm | 36 C EV5: 18
|
| H A D | lshift.asm | 35 C EV5: 3.25
|
| H A D | mode1o.asm | 36 C EV5: 30
|
| H A D | sub_n.asm | 36 C EV5: 4.75
|
| H A D | com.asm | 36 C EV5: 2.0
|
| H A D | add_n.asm | 36 C EV5: 4.75
|
| H A D | bdiv_dbm1c.asm | 35 C EV5: 18
|
| /netbsd-current/external/lgpl3/gmp/dist/mpn/alpha/ev6/ |
| H A D | aorslsh1_n.asm | 35 C EV5: 7
|
| H A D | mod_1_4.asm | 46 C EV5: 23
|
| /netbsd-current/external/lgpl3/gmp/dist/mpn/alpha/ev5/ |
| H A D | diveby3.asm | 35 C EV5: 11.5
|