Searched refs:DMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK3__DCFE5_PERFMON_COUNTER0_INT_MASK__SHIFT (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h9058 #define DMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK3__DCFE5_PERFMON_COUNTER0_INT_MASK__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h8266 #define DMCU_PERFMON_INTERRUPT_TO_HOST_EN_MASK3__DCFE5_PERFMON_COUNTER0_INT_MASK__SHIFT 0x10 macro
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