Searched refs:DMCU_PERFMON_INTERRUPT_STATUS5__OPTC_PERFMON_COUNTER_INT_OCCURRED_MASK (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h4296 #define DMCU_PERFMON_INTERRUPT_STATUS5__OPTC_PERFMON_COUNTER_INT_OCCURRED_MASK 0x00000004L macro
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H A Ddcn_2_1_0_sh_mask.h2818 #define DMCU_PERFMON_INTERRUPT_STATUS5__OPTC_PERFMON_COUNTER_INT_OCCURRED_MASK 0x00000004L macro
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H A Ddcn_2_0_0_sh_mask.h3086 #define DMCU_PERFMON_INTERRUPT_STATUS5__OPTC_PERFMON_COUNTER_INT_OCCURRED_MASK 0x00000004L macro
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