Searched refs:DMCU_PERFMON_INTERRUPT_STATUS5__DCFEV_PERFMON_COUNTER1_INT_OCCURRED_MASK (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_sh_mask.h7551 #define DMCU_PERFMON_INTERRUPT_STATUS5__DCFEV_PERFMON_COUNTER1_INT_OCCURRED_MASK 0x2 macro
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H A Ddce_10_0_sh_mask.h7661 #define DMCU_PERFMON_INTERRUPT_STATUS5__DCFEV_PERFMON_COUNTER1_INT_OCCURRED_MASK 0x2 macro
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